50 lines
1.8 KiB
Plaintext
50 lines
1.8 KiB
Plaintext
Copyright 2003, 2004, 2006 Free Software Foundation, Inc.
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This file is part of the GNU MP Library.
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The GNU MP Library is free software; you can redistribute it and/or modify
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it under the terms of the GNU Lesser General Public License as published by
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the Free Software Foundation; either version 2.1 of the License, or (at your
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option) any later version.
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The GNU MP Library is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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License for more details.
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You should have received a copy of the GNU Lesser General Public License
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along with the GNU MP Library; see the file COPYING.LIB. If not, write to
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the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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02110-1301, USA.
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AMD64 MPN SUBROUTINES
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This directory contains mpn functions for AMD64 chips. It might also be
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useful for 64-bit Pentiums, but that chip's poor carry handling makes it
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unlikely. We'll need completely separate code (in a subdirectory).
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RELEVANT OPTIMIZATION ISSUES
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The only AMD64 core as of this writing is the AMD Hammer, sold under the
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names Opteron and Athlon64. The Hammer can sustain up to 3 instructions per
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cycle, but in practice that is only possible for integer instructions. But
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almost any three integer instructions can issue simultaneously, including
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any 3 ALU operations, including shifts. Up to two memory operations can
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issue each cycle.
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Scheduling typically requires that load-use instructions are split into
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separate load and use instructions. That requires more decode resources,
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and it is rarely a win. Hammer is a deep out-of-order core.
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REFERENCES
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"System V Application Binary Interface AMD64 Architecture Processor
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Supplement", draft version 0.90, April 2003.
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