112 lines
4.2 KiB
C
112 lines
4.2 KiB
C
/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
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Copyright 1991, 1992, 1993, 1994, 1996, 1997, 1999, 2000, 2001, 2002, 2003,
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2004, 2005 Free Software Foundation, Inc.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU Lesser General Public License as published by
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the Free Software Foundation; either version 2.1 of the License, or (at your
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option) any later version.
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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License for more details.
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You should have received a copy of the GNU Lesser General Public License
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along with this file; see the file COPYING.LIB. If not, write to
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the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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MA 02110-1301, USA. */
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/* This form encourages gcc (pre-release 3.4 at least) to emit predicated
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"sub r=r,r" and "sub r=r,r,1", giving a 2 cycle latency. The generic
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code using "al<bl" arithmetically comes out making an actual 0 or 1 in a
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register, which takes an extra cycle. */
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#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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do { \
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UWtype __x; \
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__x = (al) - (bl); \
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if ((al) < (bl)) \
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(sh) = (ah) - (bh) - 1; \
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else \
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(sh) = (ah) - (bh); \
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(sl) = __x; \
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} while (0)
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#if defined (__GNUC__) && ! defined (__INTEL_COMPILER)
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/* Do both product parts in assembly, since that gives better code with
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all gcc versions. Some callers will just use the upper part, and in
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that situation we waste an instruction, but not any cycles. */
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#define umul_ppmm(ph, pl, m0, m1) \
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__asm__ ("xma.hu %0 = %2, %3, f0\n\txma.l %1 = %2, %3, f0" \
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: "=&f" (ph), "=f" (pl) \
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: "f" (m0), "f" (m1))
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#define count_leading_zeros(count, x) \
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do { \
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UWtype _x = (x), _y, _a, _c; \
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__asm__ ("mux1 %0 = %1, @rev" : "=r" (_y) : "r" (_x)); \
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__asm__ ("czx1.l %0 = %1" : "=r" (_a) : "r" (-_y | _y)); \
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_c = (_a - 1) << 3; \
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_x >>= _c; \
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if (_x >= 1 << 4) \
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_x >>= 4, _c += 4; \
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if (_x >= 1 << 2) \
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_x >>= 2, _c += 2; \
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_c += _x >> 1; \
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(count) = W_TYPE_SIZE - 1 - _c; \
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} while (0)
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/* similar to what gcc does for __builtin_ffs, but 0 based rather than 1
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based, and we don't need a special case for x==0 here */
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#define count_trailing_zeros(count, x) \
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do { \
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UWtype __ctz_x = (x); \
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__asm__ ("popcnt %0 = %1" \
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: "=r" (count) \
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: "r" ((__ctz_x-1) & ~__ctz_x)); \
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} while (0)
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#endif
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#if defined (__INTEL_COMPILER)
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#include <ia64intrin.h>
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#define umul_ppmm(ph, pl, m0, m1) \
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do { \
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UWtype _m0 = (m0), _m1 = (m1); \
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ph = _m64_xmahu (_m0, _m1, 0); \
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pl = _m0 * _m1; \
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} while (0)
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#endif
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#ifndef LONGLONG_STANDALONE
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#define udiv_qrnnd(q, r, n1, n0, d) \
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do { UWtype __di; \
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__di = __MPN(invert_limb) (d); \
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udiv_qrnnd_preinv (q, r, n1, n0, d, __di); \
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} while (0)
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#define UDIV_PREINV_ALWAYS 1
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#define UDIV_NEEDS_NORMALIZATION 1
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#endif
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#if !defined(ULONG_PARITY) && defined (__GNUC__) && ! defined (__INTEL_COMPILER)
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/* unsigned long is either 32 or 64 bits depending on the ABI, zero extend
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to a 64 bit unsigned long long for popcnt */
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#define ULONG_PARITY(p, n) \
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do { \
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unsigned long long __n = (unsigned long) (n); \
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int __p; \
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__asm__ ("popcnt %0 = %1" : "=r" (__p) : "r" (__n)); \
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(p) = __p & 1; \
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} while (0)
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#endif
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#if !defined(BSWAP_LIMB) && defined (__GNUC__) && ! defined (__INTEL_COMPILER)
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#define BSWAP_LIMB(dst, src) \
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do { \
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__asm__ ("mux1 %0 = %1, @rev" : "=r" (dst) : "r" (src)); \
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} while (0)
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#endif
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#if !defined(popc_limb) && defined (__GNUC__) && ! defined (__INTEL_COMPILER)
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#define popc_limb(result, input) \
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do { \
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__asm__ ("popcnt %0 = %1" : "=r" (result) : "r" (input)); \
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} while (0)
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#endif
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