169 lines
4.8 KiB
Plaintext
169 lines
4.8 KiB
Plaintext
Copyright 2002, 2005 Free Software Foundation, Inc.
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This file is part of the GNU MP Library.
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The GNU MP Library is free software; you can redistribute it and/or modify
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it under the terms of the GNU Lesser General Public License as published by
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the Free Software Foundation; either version 2.1 of the License, or (at your
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option) any later version.
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The GNU MP Library is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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License for more details.
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You should have received a copy of the GNU Lesser General Public License
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along with the GNU MP Library; see the file COPYING.LIB. If not, write to
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the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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02110-1301, USA.
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POWERPC 32-BIT MPN SUBROUTINES
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This directory contains mpn functions for various 32-bit PowerPC chips.
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CODE ORGANIZATION
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directory used for
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================================================
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powerpc generic, 604, 604e, 744x, 745x
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powerpc/750 740, 750, 7400, 7410
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The top-level powerpc directory is currently mostly aimed at 604/604e but
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should be reasonable on all powerpcs.
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STATUS
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The code is quite well optimized for the 604e, other chips have had less
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attention.
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Altivec SIMD available in 74xx might hold some promise, but unfortunately
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GMP only guarantees 32-bit data alignment, so there's lots of fiddling
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around with partial operations at the start and end of limb vectors. A
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128-bit limb would be a novel idea, but is unlikely to be practical, since
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it would have to work with ordinary +, -, * etc in the C code.
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Also, Altivec isn't very well suited for the GMP multiplication needs.
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Using floating-point based multiplication has much better better performance
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potential for all current powerpcs, both the ones with slow integer multiply
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units (603, 740, 750, 7400, 7410) and those with fast (604, 604e, 744x,
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745x). This is because all powerpcs do some level of pipelining in the FPU:
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603 and 750 can sustain one fmadd every 2nd cycle.
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604 and 604e can sustain one fmadd per cycle.
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7400 and 7410 can sustain 3 fmadd in 4 cycles.
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744x and 745x can sustain 4 fmadd in 5 cycles.
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REGISTER NAMES
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The normal powerpc convention is to give registers as plain numbers, like
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"mtctr 6", but on Apple MacOS X (powerpc*-*-rhapsody* and
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powerpc*-*-darwin*) the assembler demands an "r" like "mtctr r6". Note
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however when register 0 in an instruction means a literal zero the "r" is
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omitted, for instance "lwzx r6,0,r7".
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The GMP code uses the "r" forms, powerpc-defs.m4 transforms them to plain
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numbers according to what GMP_ASM_POWERPC_R_REGISTERS finds is needed.
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(Note that this style isn't fully general, as the identifier r4 and the
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register r4 will not be distinguishable on some systems. However, this is
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not a problem for the limited GMP assembly usage.)
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GLOBAL REFERENCES
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Linux non-PIC
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lis 9, __gmp_modlimb_invert_table@ha
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rlwinm 11, 5, 31, 25, 31
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la 9, __gmp_modlimb_invert_table@l(9)
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lbzx 11, 9, 11
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Linux PIC (FIXME)
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.LCL0:
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.long .LCTOC1-.LCF0
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bcl 20, 31, .LCF0
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.LCF0:
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mflr 30
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lwz 7, .LCL0-.LCF0(30)
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add 30, 7, 30
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lwz 11, .LC0-.LCTOC1(30)
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rlwinm 3, 5, 31, 25, 31
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lbzx 7, 11, 3
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AIX (always PIC)
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LC..0:
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.tc __gmp_modlimb_invert_table[TC],__gmp_modlimb_invert_table[RW]
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lwz 9, LC..0(2)
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rlwinm 0, 5, 31, 25, 31
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lbzx 0, 9, 0
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Darwin (non-PIC)
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lis r2, ha16(___gmp_modlimb_invert_table)
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rlwinm r9, r5, 31, 25, 31
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la r2, lo16(___gmp_modlimb_invert_table)(r2)
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lbzx r0, r2, r9
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Darwin (PIC)
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mflr r0
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bcl 20, 31, L0001$pb
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L0001$pb:
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mflr r7
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mtlr r0
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addis r2, r7, ha16(L___gmp_modlimb_invert_table$non_lazy_ptr-L0001$pb)
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rlwinm r9, r5, 31, 25, 31
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lwz r2, lo16(L___gmp_modlimb_invert_table$non_lazy_ptr-L0001$pb)(r2)
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lbzx r0, r2, r9
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------
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.non_lazy_symbol_pointer
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L___gmp_modlimb_invert_table$non_lazy_ptr:
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.indirect_symbol ___gmp_modlimb_invert_table
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.long 0
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.subsections_via_symbols
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For GNU/Linux and Darwin, we might want to duplicate __gmp_modlimb_invert_table
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into the text section in this file. We should thus be able to reach it like
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this:
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blr L0
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L0: mflr r2
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rlwinm r9, r5, 31, 25, 31
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addi r9, r9, lo16(local_modlimb_table-L0)
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lbzx r0, r2, r9
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REFERENCES
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PowerPC Microprocessor Family: The Programming Environments for 32-bit
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Microprocessors, IBM document G522-0290-01, 2000.
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PowerPC 604e RISC Microprocessor User's Manual with Supplement for PowerPC
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604 Microprocessor, IBM document G552-0330-00, Motorola document
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MPC604EUM/AD, 1998.
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MPC7400 RISC Microprocessor User's Manual, Motorola document MPC7400UM/D,
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rev 0, 3/2000.
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The above are available online from
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http://chips.ibm.com/techlib/products/powerpc/manuals
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http://www.mot.com/PowerPC
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----------------
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Local variables:
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mode: text
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fill-column: 76
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End:
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