308 lines
12 KiB
C
308 lines
12 KiB
C
/* $Id: x86arch.h 2199 2009-05-10 05:24:46Z peter $
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* x86 Architecture header file
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*
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* Copyright (C) 2001-2007 Peter Johnson
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND OTHER CONTRIBUTORS ``AS IS''
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR OTHER CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef YASM_X86ARCH_H
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#define YASM_X86ARCH_H
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#include <libyasm/bitvect.h>
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/* Available CPU feature flags */
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#define CPU_Any 0 /* Any old cpu will do */
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#define CPU_086 CPU_Any
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#define CPU_186 1 /* i186 or better required */
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#define CPU_286 2 /* i286 or better required */
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#define CPU_386 3 /* i386 or better required */
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#define CPU_486 4 /* i486 or better required */
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#define CPU_586 5 /* i585 or better required */
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#define CPU_686 6 /* i686 or better required */
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#define CPU_P3 7 /* Pentium3 or better required */
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#define CPU_P4 8 /* Pentium4 or better required */
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#define CPU_IA64 9 /* IA-64 or better required */
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#define CPU_K6 10 /* AMD K6 or better required */
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#define CPU_Athlon 11 /* AMD Athlon or better required */
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#define CPU_Hammer 12 /* AMD Sledgehammer or better required */
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#define CPU_FPU 13 /* FPU support required */
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#define CPU_MMX 14 /* MMX support required */
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#define CPU_SSE 15 /* Streaming SIMD extensions required */
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#define CPU_SSE2 16 /* Streaming SIMD extensions 2 required */
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#define CPU_SSE3 17 /* Streaming SIMD extensions 3 required */
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#define CPU_3DNow 18 /* 3DNow! support required */
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#define CPU_Cyrix 19 /* Cyrix-specific instruction */
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#define CPU_AMD 20 /* AMD-specific inst. (older than K6) */
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#define CPU_SMM 21 /* System Management Mode instruction */
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#define CPU_Prot 22 /* Protected mode only instruction */
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#define CPU_Undoc 23 /* Undocumented instruction */
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#define CPU_Obs 24 /* Obsolete instruction */
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#define CPU_Priv 25 /* Priveleged instruction */
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#define CPU_SVM 26 /* Secure Virtual Machine instruction */
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#define CPU_PadLock 27 /* VIA PadLock instruction */
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#define CPU_EM64T 28 /* Intel EM64T or better */
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#define CPU_SSSE3 29 /* Streaming SIMD extensions 3 required */
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#define CPU_SSE41 30 /* Streaming SIMD extensions 4.1 required */
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#define CPU_SSE42 31 /* Streaming SIMD extensions 4.2 required */
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#define CPU_SSE4a 32 /* AMD Streaming SIMD extensions 4a required */
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#define CPU_XSAVE 33 /* Intel XSAVE instructions */
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#define CPU_AVX 34 /* Intel Advanced Vector Extensions */
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#define CPU_FMA 35 /* Intel Fused-Multiply-Add Extensions */
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#define CPU_AES 36 /* AES instruction */
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#define CPU_CLMUL 37 /* PCLMULQDQ instruction */
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#define CPU_MOVBE 38 /* MOVBE instruction */
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#define CPU_XOP 39 /* AMD XOP extensions */
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#define CPU_FMA4 40 /* AMD Fused-Multiply-Add extensions */
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#define CPU_CVT16 41 /* AMD CVT16 extensions */
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typedef struct yasm_arch_x86 {
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yasm_arch_base arch; /* base structure */
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/* What instructions/features are enabled? */
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unsigned int active_cpu; /* active index into cpu_enables table */
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unsigned int cpu_enables_size; /* size of cpu_enables table */
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wordptr *cpu_enables;
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unsigned int amd64_machine;
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enum {
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X86_PARSER_NASM = 0,
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X86_PARSER_TASM = 1,
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X86_PARSER_GAS = 2
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} parser;
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unsigned int mode_bits;
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unsigned int force_strict;
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unsigned int default_rel;
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enum {
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X86_NOP_BASIC = 0,
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X86_NOP_INTEL = 1,
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X86_NOP_AMD = 2
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} nop;
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} yasm_arch_x86;
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/* 0-15 (low 4 bits) used for register number, stored in same data area.
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* Note 8-15 are only valid for some registers, and only in 64-bit mode.
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*/
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typedef enum {
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X86_REG8 = 0x1<<4,
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X86_REG8X = 0x2<<4, /* 64-bit mode only, REX prefix version of REG8 */
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X86_REG16 = 0x3<<4,
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X86_REG32 = 0x4<<4,
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X86_REG64 = 0x5<<4, /* 64-bit mode only */
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X86_FPUREG = 0x6<<4,
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X86_MMXREG = 0x7<<4,
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X86_XMMREG = 0x8<<4,
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X86_YMMREG = 0x9<<4,
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X86_CRREG = 0xA<<4,
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X86_DRREG = 0xB<<4,
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X86_TRREG = 0xC<<4,
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X86_RIP = 0xD<<4 /* 64-bit mode only, always RIP (regnum ignored) */
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} x86_expritem_reg_size;
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/* Low 8 bits are used for the prefix value, stored in same data area. */
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typedef enum {
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X86_LOCKREP = 1<<8,
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X86_ADDRSIZE = 2<<8,
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X86_OPERSIZE = 3<<8,
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X86_SEGREG = 4<<8,
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X86_REX = 5<<8
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} x86_parse_insn_prefix;
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typedef enum {
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X86_NEAR = 1,
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X86_SHORT,
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X86_FAR,
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X86_TO
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} x86_parse_targetmod;
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typedef enum {
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JMP_NONE,
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JMP_SHORT,
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JMP_NEAR,
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JMP_SHORT_FORCED,
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JMP_NEAR_FORCED
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} x86_jmp_opcode_sel;
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typedef enum {
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X86_REX_W = 3,
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X86_REX_R = 2,
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X86_REX_X = 1,
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X86_REX_B = 0
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} x86_rex_bit_pos;
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/* Sets REX (4th bit) and 3 LS bits from register size/number. Returns 1 if
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* impossible to fit reg into REX, otherwise returns 0. Input parameter rexbit
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* indicates bit of REX to use if REX is needed. Will not modify REX if not
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* in 64-bit mode or if it wasn't needed to express reg.
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*/
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int yasm_x86__set_rex_from_reg(unsigned char *rex, unsigned char *low3,
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uintptr_t reg, unsigned int bits,
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x86_rex_bit_pos rexbit);
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/* Effective address type */
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typedef struct x86_effaddr {
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yasm_effaddr ea; /* base structure */
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/* How the spare (register) bits in Mod/RM are handled:
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* Even if valid_modrm=0, the spare bits are still valid (don't overwrite!)
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* They're set in bytecode_create_insn().
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*/
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unsigned char modrm;
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unsigned char valid_modrm; /* 1 if Mod/RM byte currently valid, 0 if not */
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unsigned char need_modrm; /* 1 if Mod/RM byte needed, 0 if not */
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unsigned char sib;
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unsigned char valid_sib; /* 1 if SIB byte currently valid, 0 if not */
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unsigned char need_sib; /* 1 if SIB byte needed, 0 if not,
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0xff if unknown */
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} x86_effaddr;
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void yasm_x86__ea_init(x86_effaddr *x86_ea, unsigned int spare,
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yasm_bytecode *precbc);
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void yasm_x86__ea_set_disponly(x86_effaddr *x86_ea);
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x86_effaddr *yasm_x86__ea_create_reg(x86_effaddr *x86_ea, unsigned long reg,
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unsigned char *rex, unsigned int bits);
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x86_effaddr *yasm_x86__ea_create_imm
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(x86_effaddr *x86_ea, /*@keep@*/ yasm_expr *imm, unsigned int im_len);
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yasm_effaddr *yasm_x86__ea_create_expr(yasm_arch *arch,
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/*@keep@*/ yasm_expr *e);
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void yasm_x86__ea_destroy(yasm_effaddr *ea);
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void yasm_x86__ea_print(const yasm_effaddr *ea, FILE *f, int indent_level);
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void yasm_x86__bc_insn_opersize_override(yasm_bytecode *bc,
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unsigned int opersize);
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void yasm_x86__bc_insn_addrsize_override(yasm_bytecode *bc,
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unsigned int addrsize);
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void yasm_x86__bc_insn_set_lockrep_prefix(yasm_bytecode *bc,
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unsigned int prefix);
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/* Bytecode types */
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typedef struct x86_common {
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unsigned char addrsize; /* 0 or =mode_bits => no override */
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unsigned char opersize; /* 0 or =mode_bits => no override */
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unsigned char lockrep_pre; /* 0 indicates no prefix */
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unsigned char mode_bits;
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} x86_common;
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typedef struct x86_opcode {
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unsigned char opcode[3]; /* opcode */
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unsigned char len;
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} x86_opcode;
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typedef struct x86_insn {
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x86_common common; /* common x86 information */
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x86_opcode opcode;
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/*@null@*/ x86_effaddr *x86_ea; /* effective address */
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/*@null@*/ yasm_value *imm; /* immediate or relative value */
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unsigned char def_opersize_64; /* default operand size in 64-bit mode */
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unsigned char special_prefix; /* "special" prefix (0=none) */
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unsigned char rex; /* REX AMD64 extension, 0 if none,
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0xff if not allowed (high 8 bit reg used) */
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/* Postponed (from parsing to later binding) action options. */
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enum {
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/* None */
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X86_POSTOP_NONE = 0,
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/* Instructions that take a sign-extended imm8 as well as imm values
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* (eg, the arith instructions and a subset of the imul instructions)
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* should set this and put the imm8 form as the "normal" opcode (in
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* the first one or two bytes) and non-imm8 form in the second or
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* third byte of the opcode.
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*/
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X86_POSTOP_SIGNEXT_IMM8,
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/* Override any attempt at address-size override to 16 bits, and never
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* generate a prefix. This is used for the ENTER opcode.
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*/
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X86_POSTOP_ADDRESS16
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} postop;
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} x86_insn;
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typedef struct x86_jmp {
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x86_common common; /* common x86 information */
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x86_opcode shortop, nearop;
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yasm_value target; /* jump target */
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/* which opcode are we using? */
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/* The *FORCED forms are specified in the source as such */
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x86_jmp_opcode_sel op_sel;
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} x86_jmp;
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/* Direct (immediate) FAR jumps ONLY; indirect FAR jumps get turned into
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* x86_insn bytecodes; relative jumps turn into x86_jmp bytecodes.
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* This bytecode is not legal in 64-bit mode.
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*/
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typedef struct x86_jmpfar {
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x86_common common; /* common x86 information */
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x86_opcode opcode;
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yasm_value segment; /* target segment */
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yasm_value offset; /* target offset */
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} x86_jmpfar;
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void yasm_x86__bc_transform_insn(yasm_bytecode *bc, x86_insn *insn);
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void yasm_x86__bc_transform_jmp(yasm_bytecode *bc, x86_jmp *jmp);
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void yasm_x86__bc_transform_jmpfar(yasm_bytecode *bc, x86_jmpfar *jmpfar);
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void yasm_x86__bc_apply_prefixes
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(x86_common *common, unsigned char *rex, unsigned int def_opersize_64,
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unsigned int num_prefixes, uintptr_t *prefixes);
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/* Check an effective address. Returns 0 if EA was successfully determined,
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* 1 if invalid EA, or 2 if indeterminate EA.
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*/
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int yasm_x86__expr_checkea
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(x86_effaddr *x86_ea, unsigned char *addrsize, unsigned int bits,
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int address16_op, unsigned char *rex, yasm_bytecode *bc);
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void yasm_x86__parse_cpu(yasm_arch_x86 *arch_x86, const char *cpuid,
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size_t cpuid_len);
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yasm_arch_insnprefix yasm_x86__parse_check_insnprefix
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(yasm_arch *arch, const char *id, size_t id_len, unsigned long line,
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/*@out@*/ yasm_bytecode **bc, /*@out@*/ uintptr_t *prefix);
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yasm_arch_regtmod yasm_x86__parse_check_regtmod
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(yasm_arch *arch, const char *id, size_t id_len,
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/*@out@*/ uintptr_t *data);
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int yasm_x86__floatnum_tobytes
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(yasm_arch *arch, const yasm_floatnum *flt, unsigned char *buf,
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size_t destsize, size_t valsize, size_t shift, int warn);
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int yasm_x86__intnum_tobytes
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(yasm_arch *arch, const yasm_intnum *intn, unsigned char *buf,
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size_t destsize, size_t valsize, int shift, const yasm_bytecode *bc,
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int warn);
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unsigned int yasm_x86__get_reg_size(uintptr_t reg);
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/*@only@*/ yasm_bytecode *yasm_x86__create_empty_insn(yasm_arch *arch,
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unsigned long line);
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#endif
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