137 lines
3.1 KiB
NASM
137 lines
3.1 KiB
NASM
dnl PowerPC-32 mpn_mod_34lsub1 -- mpn remainder mod 2^24-1.
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dnl Copyright 2002, 2003, 2005 Free Software Foundation, Inc.
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dnl This file is part of the GNU MP Library.
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of the GNU Lesser General Public License as published
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dnl by the Free Software Foundation; either version 2.1 of the License, or (at
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dnl your option) any later version.
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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dnl License for more details.
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dnl You should have received a copy of the GNU Lesser General Public License
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dnl along with the GNU MP Library; see the file COPYING.LIB. If not, write
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dnl to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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dnl Boston, MA 02110-1301, USA.
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include(`../config.m4')
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C cycles/limb
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C 603e: ?
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C 604e: ?
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C 75x (G3): 3.0
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C 7400,7410 (G4): 3.0
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C 744x,745x (G4+): 3.0
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C power4/ppc970: 2.5
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C power5: 2.5
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C mp_limb_t mpn_mod_34lsub1 (mp_srcptr src, mp_size_t size)
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C
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C There seems no need to schedule the loads back, the code is still 3.0 c/l
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C on 750/7400 no matter where they're placed.
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C
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C Alternatives:
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C
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C Fetching half words would allow add instead for accumulating, instead of
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C adde and its serialization. An outer loop would be required though, since
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C 2^16 halfwords can overflow. lhz+add would be 2.0 c/l, but if there's
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C also a bdz or bdnz for each and a pointer update say every three limbs
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C then the total would be 2.67 c/l which isn't much faster than the current
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C simpler code.
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ASM_START()
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PROLOGUE(mpn_mod_34lsub1)
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C r3 src
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C r4 size
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mtctr r4
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addic r6, r3, 8 C &src[2], and clear CA
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lwz r3, 0(r3) C acc0 = src[0]
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bdz L(done)
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lwz r4, -4(r6) C acc1 = src[1]
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bdz L(two)
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lwz r5, 0(r6) C acc2 = src[2]
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lis r7, 0 C no carry if just three limbs
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bdz L(three)
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lis r7, 1 C 0x10000 carry pos
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L(top):
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C r3 acc0
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C r4 acc1
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C r5 acc2
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C r6 src, incrementing
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C r7 carry pos
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lwz r0, 4(r6)
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adde r3, r3, r0
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bdz L(end0)
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lwz r0, 8(r6)
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adde r4, r4, r0
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bdz L(end1)
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lwzu r0, 12(r6)
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adde r5, r5, r0
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bdnz L(top)
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srwi r7, r7, 8
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L(end0):
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srwi r7, r7, 8
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L(end1):
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subfe r0, r0, r0 C -1 if not CA
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andc r7, r7, r0 C final carry, 0x10000, 0x100, 1 or 0
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L(three):
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rlwinm r6, r3, 0,8,31 C acc0 low
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add r7, r7, r6
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rlwinm r6, r3, 8,24,31 C acc0 high
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add r7, r7, r6
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rlwinm r6, r4, 8,8,23 C acc1 low
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add r7, r7, r6
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rlwinm r6, r4, 16,16,31 C acc1 high
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add r7, r7, r6
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rlwinm r6, r5, 16,8,15 C acc2 low
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add r7, r7, r6
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rlwinm r6, r5, 24,8,31 C acc2 high
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add r3, r7, r6
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L(done):
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blr
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L(two):
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C r3 acc0
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C r4 acc1
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rlwinm r5, r3, 8,24,31 C acc0 high
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rlwinm r3, r3, 0,8,31 C acc0 low
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add r3, r3, r5 C acc0 high + low
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rlwinm r5, r4, 16,16,31 C acc1 high
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add r3, r3, r5 C add acc1 high
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rlwinm r5, r4, 8,8,23 C acc1 low
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add r3, r3, r5 C add acc1 low
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blr
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EPILOGUE()
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