78 lines
2.8 KiB
C
78 lines
2.8 KiB
C
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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__asm__ ("add%.l %5,%1\n\taddx%.l %3,%0" \
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: "=d" (sh), "=&d" (sl) \
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: "0" ((USItype)(ah)), "d" ((USItype)(bh)), \
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"%1" ((USItype)(al)), "g" ((USItype)(bl)))
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#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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__asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0" \
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: "=d" (sh), "=&d" (sl) \
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: "0" ((USItype)(ah)), "d" ((USItype)(bh)), \
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"1" ((USItype)(al)), "g" ((USItype)(bl)))
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/* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r. */
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#if defined (__mc68020__) || defined(mc68020) \
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|| defined (__mc68030__) || defined (mc68030) \
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|| defined (__mc68040__) || defined (mc68040) \
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|| defined (__mcpu32__) || defined (mcpu32) \
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|| defined (__NeXT__)
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#define umul_ppmm(w1, w0, u, v) \
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__asm__ ("mulu%.l %3,%1:%0" \
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: "=d" (w0), "=d" (w1) \
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: "%0" ((USItype)(u)), "dmi" ((USItype)(v)))
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#define UMUL_TIME 45
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#define udiv_qrnnd(q, r, n1, n0, d) \
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__asm__ ("divu%.l %4,%1:%0" \
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: "=d" (q), "=d" (r) \
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: "0" ((USItype)(n0)), "1" ((USItype)(n1)), "dmi" ((USItype)(d)))
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#define UDIV_TIME 90
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#define sdiv_qrnnd(q, r, n1, n0, d) \
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__asm__ ("divs%.l %4,%1:%0" \
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: "=d" (q), "=d" (r) \
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: "0" ((USItype)(n0)), "1" ((USItype)(n1)), "dmi" ((USItype)(d)))
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#else /* for other 68k family members use 16x16->32 multiplication */
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#define umul_ppmm(xh, xl, a, b) \
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do { USItype __umul_tmp1, __umul_tmp2; \
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__asm__ ("| Inlined umul_ppmm\n" \
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" move%.l %5,%3\n" \
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" move%.l %2,%0\n" \
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" move%.w %3,%1\n" \
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" swap %3\n" \
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" swap %0\n" \
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" mulu%.w %2,%1\n" \
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" mulu%.w %3,%0\n" \
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" mulu%.w %2,%3\n" \
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" swap %2\n" \
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" mulu%.w %5,%2\n" \
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" add%.l %3,%2\n" \
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" jcc 1f\n" \
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" add%.l %#0x10000,%0\n" \
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"1: move%.l %2,%3\n" \
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" clr%.w %2\n" \
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" swap %2\n" \
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" swap %3\n" \
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" clr%.w %3\n" \
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" add%.l %3,%1\n" \
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" addx%.l %2,%0\n" \
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" | End inlined umul_ppmm" \
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: "=&d" (xh), "=&d" (xl), \
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"=d" (__umul_tmp1), "=&d" (__umul_tmp2) \
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: "%2" ((USItype)(a)), "d" ((USItype)(b))); \
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} while (0)
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#define UMUL_TIME 100
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#define UDIV_TIME 400
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#endif /* not mc68020 */
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/* The '020, '030, '040 and '060 have bitfield insns.
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GCC 3.4 defines __mc68020__ when in CPU32 mode, check for __mcpu32__ to
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exclude bfffo on that chip (bitfield insns not available). */
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#if (defined (__mc68020__) || defined (mc68020) \
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|| defined (__mc68030__) || defined (mc68030) \
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|| defined (__mc68040__) || defined (mc68040) \
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|| defined (__mc68060__) || defined (mc68060) \
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|| defined (__NeXT__)) \
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&& ! defined (__mcpu32__)
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#define count_leading_zeros(count, x) \
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__asm__ ("bfffo %1{%b2:%b2},%0" \
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: "=d" (count) \
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: "od" ((USItype) (x)), "n" (0))
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#define COUNT_LEADING_ZEROS_0 32
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#endif
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