a197a2d3eb
Removed directories for no longer supported architectures.
363 lines
7.9 KiB
NASM
363 lines
7.9 KiB
NASM
dnl Intel Pentium MMX mpn_mul_1 -- mpn by limb multiplication.
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dnl Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
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dnl
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dnl This file is part of the GNU MP Library.
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dnl
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dnl The GNU MP Library is free software; you can redistribute it and/or
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dnl modify it under the terms of the GNU Lesser General Public License as
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dnl published by the Free Software Foundation; either version 2.1 of the
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dnl License, or (at your option) any later version.
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dnl
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dnl The GNU MP Library is distributed in the hope that it will be useful,
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dnl but WITHOUT ANY WARRANTY; without even the implied warranty of
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dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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dnl Lesser General Public License for more details.
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dnl
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dnl You should have received a copy of the GNU Lesser General Public
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dnl License along with the GNU MP Library; see the file COPYING.LIB. If
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dnl not, write to the Free Software Foundation, Inc., 51 Franklin Street,
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dnl Fifth Floor, Boston, MA 02110-1301, USA.
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include(`../config.m4')
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C cycles/limb
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C P5: 12.0 for 32-bit multiplier
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C 7.0 for 16-bit multiplier
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C mp_limb_t mpn_mul_1 (mp_ptr dst, mp_srcptr src, mp_size_t size,
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C mp_limb_t multiplier);
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C
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C When the multiplier is 16 bits some special case MMX code is used. Small
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C multipliers might arise reasonably often from mpz_mul_ui etc. If the size
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C is odd there's roughly a 5 cycle penalty, so times for say size==7 and
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C size==8 end up being quite close. If src isn't aligned to an 8 byte
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C boundary then one limb is processed separately with roughly a 5 cycle
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C penalty, so in that case it's say size==8 and size==9 which are close.
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C
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C Alternatives:
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C
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C MMX is not believed to be of any use for 32-bit multipliers, since for
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C instance the current method would just have to be more or less duplicated
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C for the high and low halves of the multiplier, and would probably
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C therefore run at about 14 cycles, which is slower than the plain integer
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C at 12.
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C
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C Adding the high and low MMX products using integer code seems best. An
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C attempt at using paddd and carry bit propagation with pcmpgtd didn't give
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C any joy. Perhaps something could be done keeping the values signed and
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C thereby avoiding adjustments to make pcmpgtd into an unsigned compare, or
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C perhaps not.
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C
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C Future:
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C
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C An mpn_mul_1c entrypoint would need a double carry out of the low result
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C limb in the 16-bit code, unless it could be assumed the carry fits in 16
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C bits, possibly as carry<multiplier, this being true of a big calculation
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C done piece by piece. But let's worry about that if/when mul_1c is
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C actually used.
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defframe(PARAM_MULTIPLIER,16)
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defframe(PARAM_SIZE, 12)
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defframe(PARAM_SRC, 8)
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defframe(PARAM_DST, 4)
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TEXT
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ALIGN(8)
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PROLOGUE(mpn_mul_1)
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deflit(`FRAME',0)
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movl PARAM_SIZE, %ecx
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movl PARAM_SRC, %edx
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cmpl $1, %ecx
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jne L(two_or_more)
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C one limb only
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movl PARAM_MULTIPLIER, %eax
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movl PARAM_DST, %ecx
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mull (%edx)
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movl %eax, (%ecx)
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movl %edx, %eax
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ret
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L(two_or_more):
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C eax size
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C ebx
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C ecx carry
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C edx
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C esi src
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C edi
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C ebp
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pushl %esi FRAME_pushl()
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pushl %edi FRAME_pushl()
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movl %edx, %esi C src
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movl PARAM_DST, %edi
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movl PARAM_MULTIPLIER, %eax
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pushl %ebx FRAME_pushl()
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leal (%esi,%ecx,4), %esi C src end
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leal (%edi,%ecx,4), %edi C dst end
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negl %ecx C -size
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pushl %ebp FRAME_pushl()
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cmpl $65536, %eax
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jb L(small)
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L(big):
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xorl %ebx, %ebx C carry limb
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sarl %ecx C -size/2
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jnc L(top) C with carry flag clear
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C size was odd, process one limb separately
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mull 4(%esi,%ecx,8) C m * src[0]
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movl %eax, 4(%edi,%ecx,8)
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incl %ecx
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orl %edx, %ebx C carry limb, and clear carry flag
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L(top):
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C eax
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C ebx carry
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C ecx counter, negative
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C edx
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C esi src end
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C edi dst end
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C ebp (scratch carry)
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adcl $0, %ebx
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movl (%esi,%ecx,8), %eax
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mull PARAM_MULTIPLIER
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movl %edx, %ebp
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addl %eax, %ebx
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adcl $0, %ebp
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movl 4(%esi,%ecx,8), %eax
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mull PARAM_MULTIPLIER
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movl %ebx, (%edi,%ecx,8)
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addl %ebp, %eax
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movl %eax, 4(%edi,%ecx,8)
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incl %ecx
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movl %edx, %ebx
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jnz L(top)
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adcl $0, %ebx
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popl %ebp
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movl %ebx, %eax
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popl %ebx
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popl %edi
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popl %esi
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ret
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L(small):
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C Special case for 16-bit multiplier.
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C
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C eax multiplier
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C ebx
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C ecx -size
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C edx src
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C esi src end
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C edi dst end
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C ebp multiplier
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C size<3 not supported here. At size==3 we're already a couple of
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C cycles faster, so there's no threshold as such, just use the MMX
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C as soon as possible.
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cmpl $-3, %ecx
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ja L(big)
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movd %eax, %mm7 C m
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pxor %mm6, %mm6 C initial carry word
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punpcklwd %mm7, %mm7 C m replicated 2 times
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addl $2, %ecx C -size+2
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punpckldq %mm7, %mm7 C m replicated 4 times
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andl $4, %edx C test alignment, clear carry flag
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movq %mm7, %mm0 C m
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jz L(small_entry)
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C Source is unaligned, process one limb separately.
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C
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C Plain integer code is used here, since it's smaller and is about
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C the same 13 cycles as an mmx block would be.
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C
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C An "addl $1,%ecx" doesn't clear the carry flag when size==3, hence
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C the use of separate incl and orl.
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mull -8(%esi,%ecx,4) C m * src[0]
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movl %eax, -8(%edi,%ecx,4) C dst[0]
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incl %ecx C one limb processed
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movd %edx, %mm6 C initial carry
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orl %eax, %eax C clear carry flag
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jmp L(small_entry)
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C The scheduling here is quite tricky, since so many instructions have
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C pairing restrictions. In particular the js won't pair with a movd, and
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C can't be paired with an adc since it wants flags from the inc, so
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C instructions are rotated to the top of the loop to find somewhere useful
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C for it.
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C
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C Trouble has been taken to avoid overlapping successive loop iterations,
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C since that would greatly increase the size of the startup and finishup
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C code. Actually there's probably not much advantage to be had from
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C overlapping anyway, since the difficulties are mostly with pairing, not
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C with latencies as such.
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C
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C In the comments x represents the src data and m the multiplier (16
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C bits, but replicated 4 times).
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C
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C The m signs calculated in %mm3 are a loop invariant and could be held in
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C say %mm5, but that would save only one instruction and hence be no faster.
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L(small_top):
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C eax l.low, then l.high
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C ebx (h.low)
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C ecx counter, -size+2 to 0 or 1
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C edx (h.high)
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C esi &src[size]
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C edi &dst[size]
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C ebp
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C
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C %mm0 (high products)
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C %mm1 (low products)
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C %mm2 (adjust for m using x signs)
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C %mm3 (adjust for x using m signs)
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C %mm4
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C %mm5
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C %mm6 h.low, then carry
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C %mm7 m replicated 4 times
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movd %mm6, %ebx C h.low
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psrlq $32, %mm1 C l.high
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movd %mm0, %edx C h.high
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movq %mm0, %mm6 C new c
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adcl %eax, %ebx
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incl %ecx
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movd %mm1, %eax C l.high
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movq %mm7, %mm0
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adcl %eax, %edx
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movl %ebx, -16(%edi,%ecx,4)
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movl %edx, -12(%edi,%ecx,4)
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psrlq $32, %mm6 C c
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L(small_entry):
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pmulhw -8(%esi,%ecx,4), %mm0 C h = (x*m).high
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movq %mm7, %mm1
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pmullw -8(%esi,%ecx,4), %mm1 C l = (x*m).low
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movq %mm7, %mm3
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movq -8(%esi,%ecx,4), %mm2 C x
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psraw $15, %mm3 C m signs
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pand -8(%esi,%ecx,4), %mm3 C x selected by m signs
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psraw $15, %mm2 C x signs
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paddw %mm3, %mm0 C add x to h if m neg
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pand %mm7, %mm2 C m selected by x signs
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paddw %mm2, %mm0 C add m to h if x neg
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incl %ecx
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movd %mm1, %eax C l.low
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punpcklwd %mm0, %mm6 C c + h.low << 16
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psrlq $16, %mm0 C h.high
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js L(small_top)
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movd %mm6, %ebx C h.low
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psrlq $32, %mm1 C l.high
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adcl %eax, %ebx
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popl %ebp FRAME_popl()
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movd %mm0, %edx C h.high
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psrlq $32, %mm0 C l.high
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movd %mm1, %eax C l.high
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adcl %eax, %edx
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movl %ebx, -12(%edi,%ecx,4)
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movd %mm0, %eax C c
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adcl $0, %eax
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movl %edx, -8(%edi,%ecx,4)
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orl %ecx, %ecx
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jnz L(small_done) C final %ecx==1 means even, ==0 odd
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C Size odd, one extra limb to process.
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C Plain integer code is used here, since it's smaller and is about
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C the same speed as another mmx block would be.
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movl %eax, %ecx
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movl PARAM_MULTIPLIER, %eax
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mull -4(%esi)
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addl %ecx, %eax
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adcl $0, %edx
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movl %eax, -4(%edi)
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movl %edx, %eax
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L(small_done):
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popl %ebx
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popl %edi
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popl %esi
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emms
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ret
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EPILOGUE()
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