a197a2d3eb
Removed directories for no longer supported architectures.
93 lines
2.1 KiB
NASM
93 lines
2.1 KiB
NASM
dnl PowerPC-32 mpn_mul_1 -- Multiply a limb vector with a limb and store the
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dnl result in a second limb vector.
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dnl Copyright 1995, 1997, 2000, 2002, 2003, 2005 Free Software Foundation,
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dnl Inc.
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dnl This file is part of the GNU MP Library.
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of the GNU Lesser General Public License as published
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dnl by the Free Software Foundation; either version 2.1 of the License, or (at
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dnl your option) any later version.
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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dnl License for more details.
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dnl You should have received a copy of the GNU Lesser General Public License
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dnl along with the GNU MP Library; see the file COPYING.LIB. If not, write
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dnl to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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dnl Boston, MA 02110-1301, USA.
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include(`../config.m4')
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C cycles/limb
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C 603e: ?
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C 604e: 4.0
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C 75x (G3): 4.5-11
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C 7400,7410 (G4): 4.5-11
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C 744x,745x (G4+): 6.0
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C power4/ppc970: 6.0
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C power5: 5.63
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C INPUT PARAMETERS
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C rp r3
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C up r4
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C n r5
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C vl r6
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ASM_START()
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PROLOGUE(mpn_mul_1)
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mtctr r5
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addi r3,r3,-4 C adjust res_ptr, it's offset before it's used
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li r12,0 C clear upper product reg
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addic r0,r0,0 C clear cy
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C Start software pipeline
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lwz r8,0(r4)
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bdz L(end3)
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lwzu r9,4(r4)
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mullw r11,r8,r6
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mulhwu r0,r8,r6
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bdz L(end1)
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C Software pipelined main loop
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L(loop):
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lwz r8,4(r4)
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mullw r10,r9,r6
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adde r5,r11,r12
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mulhwu r12,r9,r6
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stw r5,4(r3)
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bdz L(end2)
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lwzu r9,8(r4)
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mullw r11,r8,r6
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adde r7,r10,r0
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mulhwu r0,r8,r6
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stwu r7,8(r3)
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bdnz L(loop)
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C Finish software pipeline
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L(end1):
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mullw r10,r9,r6
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adde r5,r11,r12
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mulhwu r12,r9,r6
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stw r5,4(r3)
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adde r7,r10,r0
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stwu r7,8(r3)
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addze r3,r12
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blr
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L(end2):
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mullw r11,r8,r6
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adde r7,r10,r0
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mulhwu r0,r8,r6
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stwu r7,8(r3)
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adde r5,r11,r12
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stw r5,4(r3)
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addze r3,r0
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blr
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L(end3):
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mullw r11,r8,r6
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stw r11,4(r3)
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mulhwu r3,r8,r6
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blr
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EPILOGUE(mpn_mul_1)
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