9bf78f0866
2. Remove the now redundant 32 to 64 register mapping for mp_size_t inputs in Windows assembler
353 lines
6.9 KiB
NASM
353 lines
6.9 KiB
NASM
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; x86-64 mpn_divrem_euclidean_qr_1 -- mpn by limb division.
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; Copyright 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
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; Copyright Brian Gladman 2010 (Conversion to yasm format)
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; This file is part of the GNU MP Library.
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; The GNU MP Library is free software; you can redistribute it and/or modify
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; it under the terms of the GNU Lesser General Public License as published
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; by the Free Software Foundation; either version 3 of the License, or (at
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; your option) any later version.
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; The GNU MP Library is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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; License for more details.
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; You should have received a copy of the GNU Lesser General Public License
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; mp_limb_t mpn_divrem_euclidean_qr_1(mp_ptr, mp_size_t, mp_ptr, mp_size_t, mp_limb_t)
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; rax rdi rsi rdx rcx r8
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; rax rcx rdx r8 r9 [rsp+40]
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; mp_limb_t mpn_preinv_divrem_1(mp_ptr, mp_size_t, mp_ptr, mp_size_t, mp_limb_t, mp_limb_t, int)
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; rax rdi rsi rdx rcx r8 r9 8(rsp)
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; rax rcx rdx r8 r9 [rsp+40] [rsp+48] [rsp+56]
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%include 'yasm_mac.inc'
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BITS 64
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TEXT
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%define reg_save_list rbx, rbp, rsi, rdi, r12, r13
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%define SPECIAL_CODE_FOR_NORMALIZED_DIVISOR
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xalign 16
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WIN64_GCC_PROC mpn_divrem_euclidean_qr_1, 5, frame
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xor eax, eax
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mov r12, rsi
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mov rbx, rcx
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add rcx, rsi
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mov rsi, rdx
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je .17
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lea rdi, [rdi+rcx*8-8]
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xor ebp, ebp
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%ifdef SPECIAL_CODE_FOR_NORMALIZED_DIVISOR
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test r8, r8
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jns .6
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test rbx, rbx
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je .1
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mov rbp, [rsi+rbx*8-8]
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dec rbx
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mov rax, rbp
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sub rbp, r8
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cmovb rbp, rax
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sbb eax, eax
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inc eax
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mov [rdi], rax
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lea rdi, [rdi-8]
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.1: mov rdx, r8
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mov rax, -1
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not rdx
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div r8
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mov r9, rax
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mov rax, rbp
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jmp .4
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xalign 16
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.2: mov r10, [rsi+rbx*8]
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lea rbp, [rax+1]
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mul r9
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add rax, r10
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adc rdx, rbp
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mov rbp, rax
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mov r13, rdx
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imul rdx, r8
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sub r10, rdx
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mov rax, r8
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add rax, r10
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cmp r10, rbp
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cmovb rax, r10
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adc r13, -1
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cmp rax, r8
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jae .5
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.3: mov [rdi], r13
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sub rdi, 8
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.4: dec rbx
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jns .2
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xor ecx, ecx
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jmp .14
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.5: sub rax, r8
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inc r13
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jmp .3
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%endif
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.6: test rbx, rbx
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je .7
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mov rax, [rsi+rbx*8-8]
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cmp rax, r8
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jae .7
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mov [rdi], rbp
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mov rbp, rax
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lea rdi, [rdi-8]
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je .17
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dec rbx
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.7: bsr rcx, r8
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not ecx
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sal r8, cl
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sal rbp, cl
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mov rdx, r8
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mov rax, -1
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not rdx
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div r8
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test rbx, rbx
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mov r9, rax
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mov rax, rbp
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je .14
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mov rbp, [rsi+rbx*8-8]
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shr rax, cl
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shld rax, rbp, cl
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sub rbx, 2
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js .10
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xalign 16
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.8: nop
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mov r10, [rsi+rbx*8]
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lea r11, [rax+1]
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shld rbp, r10, cl
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mul r9
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add rax, rbp
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adc rdx, r11
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mov r11, rax
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mov r13, rdx
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imul rdx, r8
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sub rbp, rdx
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mov rax, r8
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add rax, rbp
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cmp rbp, r11
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cmovb rax, rbp
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adc r13, -1
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cmp rax, r8
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jae .12
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.9: mov [rdi], r13
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sub rdi, 8
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dec rbx
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mov rbp, r10
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jns .8
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.10:lea r11, [rax+1]
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sal rbp, cl
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mul r9
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add rax, rbp
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adc rdx, r11
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mov r11, rax
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mov r13, rdx
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imul rdx, r8
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sub rbp, rdx
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mov rax, r8
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add rax, rbp
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cmp rbp, r11
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cmovb rax, rbp
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adc r13, -1
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cmp rax, r8
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jae .13
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.11:mov [rdi], r13
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sub rdi, 8
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jmp .14
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.12:sub rax, r8
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inc r13
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jmp .9
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.13:sub rax, r8
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inc r13
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jmp .11
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.14:mov rbp, r8
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neg rbp
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jmp .16
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xalign 16
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.15:lea r11, [rax+1]
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mul r9
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add rdx, r11
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mov r11, rax
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mov r13, rdx
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imul rdx, rbp
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mov rax, r8
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add rax, rdx
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cmp rdx, r11
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cmovb rax, rdx
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adc r13, -1
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mov [rdi], r13
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sub rdi, 8
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.16:dec r12
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jns .15
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shr rax, cl
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.17:
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WIN64_GCC_END
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xalign 16
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WIN64_GCC_PROC mpn_preinv_divrem_1, 7, frame
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xor eax, eax
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mov r12, rsi
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mov rbx, rcx
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add rcx, rsi
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mov rsi, rdx
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lea rdi, [rdi+rcx*8-8]
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test r8, r8
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js .3
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mov cl, [rsp+stack_use+0x38]
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shl r8, cl
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jmp .7
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%ifdef SPECIAL_CODE_FOR_NORMALIZED_DIVISOR
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xalign 16
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.1: mov r10, [rsi+rbx*8]
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lea rbp, [rax+1]
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mul r9
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add rax, r10
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adc rdx, rbp
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mov rbp, rax
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mov r13, rdx
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imul rdx, r8
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sub r10, rdx
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mov rax, r8
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add rax, r10
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cmp r10, rbp
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cmovb rax, r10
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adc r13, -1
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cmp rax, r8
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jae .4
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.2: mov [rdi], r13
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sub rdi, 8
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.3: dec rbx
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jns .1
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xor ecx, ecx
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jmp .14
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.4: sub rax, r8
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inc r13
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jmp .2
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%endif
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.5: test rbx, rbx
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je .6
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mov rax, [rsi+rbx*8-8]
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cmp rax, r8
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jae .6
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mov [rdi], rbp
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mov rbp, rax
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lea rdi, [rdi-8]
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je .17
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dec rbx
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.6: bsr rcx, r8
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not ecx
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sal r8, cl
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sal rbp, cl
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mov rdx, r8
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mov rax, -1
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not rdx
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div r8
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test rbx, rbx
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mov r9, rax
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mov rax, rbp
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je .14
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.7: mov rbp, [rsi+rbx*8-8]
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shr rax, cl
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shld rax, rbp, cl
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sub rbx, 2
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js .10
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xalign 16
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.8: nop
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mov r10, [rsi+rbx*8]
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lea r11, [rax+1]
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shld rbp, r10, cl
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mul r9
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add rax, rbp
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adc rdx, r11
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mov r11, rax
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mov r13, rdx
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imul rdx, r8
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sub rbp, rdx
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mov rax, r8
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add rax, rbp
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cmp rbp, r11
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cmovb rax, rbp
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adc r13, -1
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cmp rax, r8
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jae .12
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.9: mov [rdi], r13
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sub rdi, 8
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dec rbx
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mov rbp, r10
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jns .8
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.10:lea r11, [rax+1]
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sal rbp, cl
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mul r9
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add rax, rbp
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adc rdx, r11
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mov r11, rax
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mov r13, rdx
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imul rdx, r8
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sub rbp, rdx
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mov rax, r8
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add rax, rbp
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cmp rbp, r11
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cmovb rax, rbp
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adc r13, -1
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cmp rax, r8
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jae .13
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.11:mov [rdi], r13
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sub rdi, 8
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jmp .14
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.12:sub rax, r8
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inc r13
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jmp .9
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.13:sub rax, r8
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inc r13
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jmp .11
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.14:mov rbp, r8
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neg rbp
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jmp .16
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xalign 16
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.15:lea r11, [rax+1]
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mul r9
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add rdx, r11
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mov r11, rax
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mov r13, rdx
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imul rdx, rbp
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mov rax, r8
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add rax, rdx
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cmp rdx, r11
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cmovb rax, rdx
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adc r13, -1
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mov [rdi], r13
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sub rdi, 8
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.16:dec r12
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jns .15
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shr rax, cl
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.17:
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WIN64_GCC_END
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end
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