612 lines
15 KiB
NASM
612 lines
15 KiB
NASM
dnl IA-64 mpn_add_n/mpn_sub_n -- mpn addition and subtraction.
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dnl Copyright 2003, 2004, 2005 Free Software Foundation, Inc.
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dnl This file is part of the GNU MP Library.
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of the GNU Lesser General Public License as published
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dnl by the Free Software Foundation; either version 3 of the License, or (at
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dnl your option) any later version.
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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dnl License for more details.
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dnl You should have received a copy of the GNU Lesser General Public License
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dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/.
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include(`../config.m4')
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C cycles/limb
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C Itanium: 2.67
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C Itanium 2: 1.25
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C TODO
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C * Consider using special code for small n, using something like
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C "switch (8 * (n >= 8) + (n mod 8))" to enter it and feed-in code.
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C INPUT PARAMETERS
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define(`rp',`r32')
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define(`up',`r33')
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define(`vp',`r34')
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define(`n',`r35')
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ifdef(`OPERATION_add_n',`
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define(ADDSUB, add)
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define(PRED, ltu)
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define(INCR, 1)
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define(LIM, -1)
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define(func, mpn_add_n)
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')
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ifdef(`OPERATION_sub_n',`
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define(ADDSUB, sub)
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define(PRED, gtu)
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define(INCR, -1)
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define(LIM, 0)
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define(func, mpn_sub_n)
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')
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C Some useful aliases for registers we use
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define(`u0',`r14') define(`u1',`r15') define(`u2',`r16') define(`u3',`r17')
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define(`u4',`r18') define(`u5',`r19') define(`u6',`r20') define(`u7',`r21')
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define(`v0',`r24') define(`v1',`r25') define(`v2',`r26') define(`v3',`r27')
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define(`v4',`r28') define(`v5',`r29') define(`v6',`r30') define(`v7',`r31')
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define(`w0',`r22') define(`w1',`r9') define(`w2',`r8') define(`w3',`r23')
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define(`w4',`r22') define(`w5',`r9') define(`w6',`r8') define(`w7',`r23')
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define(`rpx',`r3')
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MULFUNC_PROLOGUE(mpn_add_n mpn_sub_n)
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ASM_START()
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PROLOGUE(func)
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.prologue
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.save ar.lc, r2
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.body
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ifdef(`HAVE_ABI_32',`
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addp4 rp = 0, rp C M I
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addp4 up = 0, up C M I
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addp4 vp = 0, vp C M I
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zxt4 n = n C I
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;;
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')
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{.mmi C 00
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ld8 r11 = [vp], 8 C M01
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ld8 r10 = [up], 8 C M01
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mov.i r2 = ar.lc C I0
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}
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{.mmi
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and r14 = 7, n C M I
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cmp.lt p15, p14 = 8, n C M I
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add n = -8, n C M I
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;;
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}
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{.mmi C 01
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cmp.eq p6, p0 = 1, r14 C M I
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cmp.eq p7, p0 = 2, r14 C M I
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cmp.eq p8, p0 = 3, r14 C M I
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}
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{.bbb
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(p6) br.dptk .Lb001 C B
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(p7) br.dptk .Lb010 C B
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(p8) br.dptk .Lb011 C B
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;;
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}
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{.mmi C 02
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cmp.eq p9, p0 = 4, r14 C M I
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cmp.eq p10, p0 = 5, r14 C M I
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cmp.eq p11, p0 = 6, r14 C M I
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}
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{.bbb
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(p9) br.dptk .Lb100 C B
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(p10) br.dptk .Lb101 C B
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(p11) br.dptk .Lb110 C B
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;;
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} C 03
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{.mmb
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cmp.eq p12, p0 = 7, r14 C M I
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add n = -1, n C loop count M I
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(p12) br.dptk .Lb111 C B
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}
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.Lb000: ld8 v2 = [vp], 8 C M01
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ld8 u2 = [up], 8 C M01
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add rpx = 8, rp C M I
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;;
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ld8 v3 = [vp], 8 C M01
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ld8 u3 = [up], 8 C M01
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ADDSUB w1 = r10, r11 C M I
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;;
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ld8 v4 = [vp], 8 C M01
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ld8 u4 = [up], 8 C M01
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cmp.PRED p7, p0 = w1, r10 C M I
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;;
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ld8 v5 = [vp], 8 C M01
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ld8 u5 = [up], 8 C M01
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ADDSUB w2 = u2, v2 C M I
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;;
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ld8 v6 = [vp], 8 C M01
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ld8 u6 = [up], 8 C M01
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cmp.PRED p8, p0 = w2, u2 C M I
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;;
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ld8 v7 = [vp], 8 C M01
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ld8 u7 = [up], 8 C M01
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ADDSUB w3 = u3, v3 C M I
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;;
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ld8 v0 = [vp], 8 C M01
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ld8 u0 = [up], 8 C M01
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cmp.PRED p9, p0 = w3, u3 C M I
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(p7) cmp.eq.or p8, p0 = LIM, w2 C M I
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(p7) add w2 = INCR, w2 C M I
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(p14) br.cond.dptk .Lcj8 C B
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;;
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.grt8: ld8 v1 = [vp], 8 C M01
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ld8 u1 = [up], 8 C M01
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shr.u n = n, 3 C I0
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;;
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add r11 = 512, vp
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ld8 v2 = [vp], 8 C M01
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add r10 = 512, up
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ld8 u2 = [up], 8 C M01
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nop.i 0
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nop.b 0
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;;
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ld8 v3 = [vp], 8 C M01
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ld8 u3 = [up], 8 C M01
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mov.i ar.lc = n C I0
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br .LL000 C B
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.Lb001: add rpx = 16, rp C M I
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ADDSUB w0 = r10, r11 C M I
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(p15) br.cond.dpnt .grt1 C B
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;;
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cmp.PRED p6, p0 = w0, r10 C M I
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mov r8 = 0 C M I
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br .Lcj1 C B
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.grt1: ld8 v1 = [vp], 8 C M01
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ld8 u1 = [up], 8 C M01
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shr.u n = n, 3 C I0
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;;
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ld8 v2 = [vp], 8 C M01
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ld8 u2 = [up], 8 C M01
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cmp.ne p9, p0 = r0, r0 C read near Loop
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;;
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ld8 v3 = [vp], 8 C M01
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ld8 u3 = [up], 8 C M01
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mov.i ar.lc = n C I0
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;;
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ld8 v4 = [vp], 8 C M01
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ld8 u4 = [up], 8 C M01
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cmp.PRED p6, p0 = w0, r10 C M I
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;;
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ld8 v5 = [vp], 8 C M01
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ld8 u5 = [up], 8 C M01
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ADDSUB w1 = u1, v1 C M I
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;;
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ld8 v6 = [vp], 8 C M01
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ld8 u6 = [up], 8 C M01
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cmp.PRED p7, p0 = w1, u1 C M I
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;;
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ld8 v7 = [vp], 8 C M01
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ld8 u7 = [up], 8 C M01
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ADDSUB w2 = u2, v2 C M I
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;;
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add r11 = 512, vp
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ld8 v0 = [vp], 8 C M01
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add r10 = 512, up
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ld8 u0 = [up], 8 C M01
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br.cloop.dptk .Loop C B
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br .Lcj9 C B
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.Lb010: ld8 v0 = [vp], 8 C M01
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ld8 u0 = [up], 8 C M01
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add rpx = 24, rp C M I
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ADDSUB w7 = r10, r11 C M I
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(p15) br.cond.dpnt .grt2 C B
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;;
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cmp.PRED p9, p0 = w7, r10 C M I
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ADDSUB w0 = u0, v0 C M I
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br .Lcj2 C B
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.grt2: ld8 v1 = [vp], 8 C M01
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ld8 u1 = [up], 8 C M01
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shr.u n = n, 3 C I0
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;;
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ld8 v2 = [vp], 8 C M01
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ld8 u2 = [up], 8 C M01
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;;
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ld8 v3 = [vp], 8 C M01
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ld8 u3 = [up], 8 C M01
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mov.i ar.lc = n C I0
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;;
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ld8 v4 = [vp], 8 C M01
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ld8 u4 = [up], 8 C M01
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;;
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ld8 v5 = [vp], 8 C M01
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ld8 u5 = [up], 8 C M01
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cmp.PRED p9, p0 = w7, r10 C M I
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;;
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ld8 v6 = [vp], 8 C M01
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ld8 u6 = [up], 8 C M01
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ADDSUB w0 = u0, v0 C M I
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;;
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add r11 = 512, vp
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ld8 v7 = [vp], 8 C M01
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add r10 = 512, up
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ld8 u7 = [up], 8 C M01
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br .LL01x C B
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.Lb011: ld8 v7 = [vp], 8 C M01
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ld8 u7 = [up], 8 C M01
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ADDSUB w6 = r10, r11 C M I
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;;
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ld8 v0 = [vp], 8 C M01
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ld8 u0 = [up], 8 C M01
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(p15) br.cond.dpnt .grt3 C B
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;;
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cmp.PRED p8, p0 = w6, r10 C M I
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ADDSUB w7 = u7, v7 C M I
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;;
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st8 [rp] = w6, 8 C M23
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cmp.PRED p9, p0 = w7, u7 C M I
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br .Lcj3 C B
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.grt3: ld8 v1 = [vp], 8 C M01
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ld8 u1 = [up], 8 C M01
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add rpx = 32, rp C M I
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;;
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ld8 v2 = [vp], 8 C M01
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ld8 u2 = [up], 8 C M01
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shr.u n = n, 3 C I0
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;;
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ld8 v3 = [vp], 8 C M01
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ld8 u3 = [up], 8 C M01
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cmp.PRED p8, p0 = w6, r10 C M I
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;;
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ld8 v4 = [vp], 8 C M01
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ld8 u4 = [up], 8 C M01
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mov.i ar.lc = n C I0
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ADDSUB w7 = u7, v7 C M I
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nop.i 0
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nop.b 0
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;;
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ld8 v5 = [vp], 8 C M01
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ld8 u5 = [up], 8 C M01
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cmp.PRED p9, p0 = w7, u7 C M I
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;;
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add r11 = 512, vp
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ld8 v6 = [vp], 8 C M01
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add r10 = 512, up
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ld8 u6 = [up], 8 C M01
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(p8) cmp.eq.or p9, p0 = LIM, w7 C M I
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;;
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ld8 v7 = [vp], 8 C M01
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ld8 u7 = [up], 8 C M01
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(p8) add w7 = INCR, w7 C M I
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st8 [rp] = w6, 8 C M23
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ADDSUB w0 = u0, v0 C M I
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br .LL01x C B
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.Lb100: ld8 v6 = [vp], 8 C M01
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ld8 u6 = [up], 8 C M01
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add rpx = 8, rp C M I
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;;
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ld8 v7 = [vp], 8 C M01
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ld8 u7 = [up], 8 C M01
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ADDSUB w5 = r10, r11 C M I
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;;
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ld8 v0 = [vp], 8 C M01
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ld8 u0 = [up], 8 C M01
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(p15) br.cond.dpnt .grt4 C B
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;;
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cmp.PRED p7, p0 = w5, r10 C M I
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ADDSUB w6 = u6, v6 C M I
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;;
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cmp.PRED p8, p0 = w6, u6 C M I
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ADDSUB w7 = u7, v7 C M I
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br .Lcj4 C B
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.grt4: ld8 v1 = [vp], 8 C M01
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ld8 u1 = [up], 8 C M01
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shr.u n = n, 3 C I0
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cmp.PRED p7, p0 = w5, r10 C M I
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;;
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ld8 v2 = [vp], 8 C M01
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ld8 u2 = [up], 8 C M01
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ADDSUB w6 = u6, v6 C M I
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;;
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ld8 v3 = [vp], 8 C M01
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ld8 u3 = [up], 8 C M01
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cmp.PRED p8, p0 = w6, u6 C M I
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;;
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ld8 v4 = [vp], 8 C M01
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ld8 u4 = [up], 8 C M01
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mov.i ar.lc = n C I0
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;;
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ld8 v5 = [vp], 8 C M01
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ld8 u5 = [up], 8 C M01
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ADDSUB w7 = u7, v7 C M I
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;;
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add r11 = 512, vp
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ld8 v6 = [vp], 8 C M01
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add r10 = 512, up
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ld8 u6 = [up], 8 C M01
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cmp.PRED p9, p0 = w7, u7 C M I
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;;
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ld8 v7 = [vp], 8 C M01
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ld8 u7 = [up], 8 C M01
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(p7) cmp.eq.or p8, p0 = LIM, w6 C M I
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(p7) add w6 = INCR, w6 C M I
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br .LL100 C B
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.Lb101: ld8 v5 = [vp], 8 C M01
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ld8 u5 = [up], 8 C M01
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add rpx = 16, rp C M I
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;;
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ld8 v6 = [vp], 8 C M01
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ld8 u6 = [up], 8 C M01
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ADDSUB w4 = r10, r11 C M I
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;;
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ld8 v7 = [vp], 8 C M01
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ld8 u7 = [up], 8 C M01
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cmp.PRED p6, p0 = w4, r10 C M I
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;;
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ld8 v0 = [vp], 8 C M01
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ld8 u0 = [up], 8 C M01
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ADDSUB w5 = u5, v5 C M I
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shr.u n = n, 3 C I0
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(p15) br.cond.dpnt .grt5 C B
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;;
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cmp.PRED p7, p0 = w5, u5 C M I
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ADDSUB w6 = u6, v6 C M I
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br .Lcj5 C B
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.grt5: ld8 v1 = [vp], 8 C M01
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ld8 u1 = [up], 8 C M01
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;;
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ld8 v2 = [vp], 8 C M01
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ld8 u2 = [up], 8 C M01
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mov.i ar.lc = n C I0
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;;
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ld8 v3 = [vp], 8 C M01
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ld8 u3 = [up], 8 C M01
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cmp.PRED p7, p0 = w5, u5 C M I
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;;
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ld8 v4 = [vp], 8 C M01
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ld8 u4 = [up], 8 C M01
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ADDSUB w6 = u6, v6 C M I
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;;
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add r11 = 512, vp
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ld8 v5 = [vp], 8 C M01
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add r10 = 512, up
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ld8 u5 = [up], 8 C M01
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br .LL101 C B
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.Lb110: ld8 v4 = [vp], 8 C M01
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ld8 u4 = [up], 8 C M01
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add rpx = 24, rp C M I
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;;
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ld8 v5 = [vp], 8 C M01
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ld8 u5 = [up], 8 C M01
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ADDSUB w3 = r10, r11 C M I
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;;
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ld8 v6 = [vp], 8 C M01
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ld8 u6 = [up], 8 C M01
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shr.u n = n, 3 C I0
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;;
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ld8 v7 = [vp], 8 C M01
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ld8 u7 = [up], 8 C M01
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cmp.PRED p9, p0 = w3, r10 C M I
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;;
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ld8 v0 = [vp], 8 C M01
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ld8 u0 = [up], 8 C M01
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ADDSUB w4 = u4, v4 C M I
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(p14) br.cond.dptk .Lcj67 C B
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;;
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.grt6: ld8 v1 = [vp], 8 C M01
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ld8 u1 = [up], 8 C M01
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mov.i ar.lc = n C I0
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cmp.PRED p9, p0 = w3, r10 C M I
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nop.i 0
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nop.b 0
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;;
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ld8 v2 = [vp], 8 C M01
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ld8 u2 = [up], 8 C M01
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ADDSUB w4 = u4, v4 C M I
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;;
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add r11 = 512, vp
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ld8 v3 = [vp], 8 C M01
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add r10 = 512, up
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ld8 u3 = [up], 8 C M01
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br .LL11x C B
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.Lb111: ld8 v3 = [vp], 8 C M01
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ld8 u3 = [up], 8 C M01
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add rpx = 32, rp C M I
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;;
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ld8 v4 = [vp], 8 C M01
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ld8 u4 = [up], 8 C M01
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ADDSUB w2 = r10, r11 C M I
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;;
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ld8 v5 = [vp], 8 C M01
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ld8 u5 = [up], 8 C M01
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cmp.PRED p8, p0 = w2, r10 C M I
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;;
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ld8 v6 = [vp], 8 C M01
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ld8 u6 = [up], 8 C M01
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ADDSUB w3 = u3, v3 C M I
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;;
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ld8 v7 = [vp], 8 C M01
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ld8 u7 = [up], 8 C M01
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cmp.PRED p9, p0 = w3, u3 C M I
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;;
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ld8 v0 = [vp], 8 C M01
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ld8 u0 = [up], 8 C M01
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(p15) br.cond.dpnt .grt7 C B
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;;
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st8 [rp] = w2, 8 C M23
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(p8) cmp.eq.or p9, p0 = LIM, w3 C M I
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(p8) add w3 = INCR, w3 C M I
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ADDSUB w4 = u4, v4 C M I
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br .Lcj67 C B
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.grt7: ld8 v1 = [vp], 8 C M01
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ld8 u1 = [up], 8 C M01
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shr.u n = n, 3 C I0
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|
(p8) cmp.eq.or p9, p0 = LIM, w3 C M I
|
|
nop.i 0
|
|
nop.b 0
|
|
;;
|
|
add r11 = 512, vp
|
|
ld8 v2 = [vp], 8 C M01
|
|
add r10 = 512, up
|
|
ld8 u2 = [up], 8 C M01
|
|
(p8) add w3 = INCR, w3 C M I
|
|
nop.b 0
|
|
;;
|
|
ld8 v3 = [vp], 8 C M01
|
|
ld8 u3 = [up], 8 C M01
|
|
mov.i ar.lc = n C I0
|
|
st8 [rp] = w2, 8 C M23
|
|
ADDSUB w4 = u4, v4 C M I
|
|
br .LL11x C B
|
|
|
|
C *** MAIN LOOP START ***
|
|
ALIGN(32)
|
|
.Loop: ld8 v1 = [vp], 8 C M01
|
|
cmp.PRED p7, p0 = w1, u1 C M I
|
|
(p9) cmp.eq.or p6, p0 = LIM, w0 C M I
|
|
ld8 u1 = [up], 8 C M01
|
|
(p9) add w0 = INCR, w0 C M I
|
|
ADDSUB w2 = u2, v2 C M I
|
|
;;
|
|
ld8 v2 = [vp], 8 C M01
|
|
cmp.PRED p8, p0 = w2, u2 C M I
|
|
(p6) cmp.eq.or p7, p0 = LIM, w1 C M I
|
|
ld8 u2 = [up], 8 C M01
|
|
(p6) add w1 = INCR, w1 C M I
|
|
ADDSUB w3 = u3, v3 C M I
|
|
;;
|
|
st8 [rp] = w0, 8 C M23
|
|
ld8 v3 = [vp], 8 C M01
|
|
cmp.PRED p9, p0 = w3, u3 C M I
|
|
(p7) cmp.eq.or p8, p0 = LIM, w2 C M I
|
|
ld8 u3 = [up], 8 C M01
|
|
(p7) add w2 = INCR, w2 C M I
|
|
;;
|
|
.LL000: st8 [rp] = w1, 16 C M23
|
|
st8 [rpx] = w2, 32 C M23
|
|
(p8) cmp.eq.or p9, p0 = LIM, w3 C M I
|
|
lfetch [r10], 64
|
|
(p8) add w3 = INCR, w3 C M I
|
|
ADDSUB w4 = u4, v4 C M I
|
|
;;
|
|
.LL11x: st8 [rp] = w3, 8 C M23
|
|
ld8 v4 = [vp], 8 C M01
|
|
cmp.PRED p6, p0 = w4, u4 C M I
|
|
ld8 u4 = [up], 8 C M01
|
|
ADDSUB w5 = u5, v5 C M I
|
|
;;
|
|
ld8 v5 = [vp], 8 C M01
|
|
cmp.PRED p7, p0 = w5, u5 C M I
|
|
(p9) cmp.eq.or p6, p0 = LIM, w4 C M I
|
|
ld8 u5 = [up], 8 C M01
|
|
(p9) add w4 = INCR, w4 C M I
|
|
ADDSUB w6 = u6, v6 C M I
|
|
;;
|
|
.LL101: ld8 v6 = [vp], 8 C M01
|
|
cmp.PRED p8, p0 = w6, u6 C M I
|
|
(p6) cmp.eq.or p7, p0 = LIM, w5 C M I
|
|
ld8 u6 = [up], 8 C M01
|
|
(p6) add w5 = INCR, w5 C M I
|
|
ADDSUB w7 = u7, v7 C M I
|
|
;;
|
|
st8 [rp] = w4, 8 C M23
|
|
ld8 v7 = [vp], 8 C M01
|
|
cmp.PRED p9, p0 = w7, u7 C M I
|
|
(p7) cmp.eq.or p8, p0 = LIM, w6 C M I
|
|
ld8 u7 = [up], 8 C M01
|
|
(p7) add w6 = INCR, w6 C M I
|
|
;;
|
|
.LL100: st8 [rp] = w5, 16 C M23
|
|
st8 [rpx] = w6, 32 C M23
|
|
(p8) cmp.eq.or p9, p0 = LIM, w7 C M I
|
|
lfetch [r11], 64
|
|
(p8) add w7 = INCR, w7 C M I
|
|
ADDSUB w0 = u0, v0 C M I
|
|
;;
|
|
.LL01x: st8 [rp] = w7, 8 C M23
|
|
ld8 v0 = [vp], 8 C M01
|
|
cmp.PRED p6, p0 = w0, u0 C M I
|
|
ld8 u0 = [up], 8 C M01
|
|
ADDSUB w1 = u1, v1 C M I
|
|
br.cloop.dptk .Loop C B
|
|
;;
|
|
C *** MAIN LOOP END ***
|
|
|
|
cmp.PRED p7, p0 = w1, u1 C M I
|
|
(p9) cmp.eq.or p6, p0 = LIM, w0 C M I
|
|
(p9) add w0 = INCR, w0 C M I
|
|
ADDSUB w2 = u2, v2 C M I
|
|
;;
|
|
.Lcj9: cmp.PRED p8, p0 = w2, u2 C M I
|
|
(p6) cmp.eq.or p7, p0 = LIM, w1 C M I
|
|
st8 [rp] = w0, 8 C M23
|
|
(p6) add w1 = INCR, w1 C M I
|
|
ADDSUB w3 = u3, v3 C M I
|
|
;;
|
|
cmp.PRED p9, p0 = w3, u3 C M I
|
|
(p7) cmp.eq.or p8, p0 = LIM, w2 C M I
|
|
(p7) add w2 = INCR, w2 C M I
|
|
;;
|
|
.Lcj8: st8 [rp] = w1, 16 C M23
|
|
st8 [rpx] = w2, 32 C M23
|
|
(p8) cmp.eq.or p9, p0 = LIM, w3 C M I
|
|
(p8) add w3 = INCR, w3 C M I
|
|
ADDSUB w4 = u4, v4 C M I
|
|
;;
|
|
.Lcj67: st8 [rp] = w3, 8 C M23
|
|
cmp.PRED p6, p0 = w4, u4 C M I
|
|
ADDSUB w5 = u5, v5 C M I
|
|
;;
|
|
cmp.PRED p7, p0 = w5, u5 C M I
|
|
(p9) cmp.eq.or p6, p0 = LIM, w4 C M I
|
|
(p9) add w4 = INCR, w4 C M I
|
|
ADDSUB w6 = u6, v6 C M I
|
|
;;
|
|
.Lcj5: cmp.PRED p8, p0 = w6, u6 C M I
|
|
(p6) cmp.eq.or p7, p0 = LIM, w5 C M I
|
|
st8 [rp] = w4, 8 C M23
|
|
(p6) add w5 = INCR, w5 C M I
|
|
ADDSUB w7 = u7, v7 C M I
|
|
;;
|
|
.Lcj4: cmp.PRED p9, p0 = w7, u7 C M I
|
|
(p7) cmp.eq.or p8, p0 = LIM, w6 C M I
|
|
(p7) add w6 = INCR, w6 C M I
|
|
;;
|
|
st8 [rp] = w5, 16 C M23
|
|
st8 [rpx] = w6, 32 C M23
|
|
.Lcj3:
|
|
(p8) cmp.eq.or p9, p0 = LIM, w7 C M I
|
|
(p8) add w7 = INCR, w7 C M I
|
|
ADDSUB w0 = u0, v0 C M I
|
|
;;
|
|
.Lcj2: st8 [rp] = w7, 8 C M23
|
|
cmp.PRED p6, p0 = w0, u0 C M I
|
|
;;
|
|
(p9) cmp.eq.or p6, p0 = LIM, w0 C M I
|
|
(p9) add w0 = INCR, w0 C M I
|
|
mov r8 = 0 C M I
|
|
;;
|
|
.Lcj1: st8 [rp] = w0, 8 C M23
|
|
mov.i ar.lc = r2 C I0
|
|
(p6) mov r8 = 1 C M I
|
|
br.ret.sptk.many b0 C B
|
|
EPILOGUE()
|
|
ASM_END()
|