70a4a3823f
2. Improve assembler interface descriptions in AMD64 headers
150 lines
3.5 KiB
NASM
150 lines
3.5 KiB
NASM
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; Copyright 2009 Jason Moxham
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;
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; This file is part of the MPIR Library.
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;
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; Windows Conversion Copyright 2008 Brian Gladman
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;
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; The MPIR Library is free software; you can redistribute it and/or modify
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; it under the terms of the GNU Lesser General Public License as published
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; by the Free Software Foundation; either version 2.1 of the License, or (at
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; your option) any later version.
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;
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; The MPIR Library is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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; License for more details.
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;
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; You should have received a copy of the GNU Lesser General Public License
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; along with the MPIR Library; see the file COPYING.LIB. If not, write
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; to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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; Boston, MA 02110-1301, USA.
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;
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; mp_limb_t pn_addlsh_n(mp_ptr, mp_ptr, mp_ptr, mp_size_t, mp_uint)
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; rax rdi rsi rdx rcx r8
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; rax rcx rdx r8 r9 [rsp+40]
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%include "..\yasm_mac.inc"
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%define reg_save_list rbx, rsi, rdi, r12
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CPU Core2
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BITS 64
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FRAME_PROC mpn_addlsh_n, 0, reg_save_list
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movsxd rax, r9d
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lea rdi, [rcx+rax*8-32]
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lea rsi, [rdx+rax*8-32]
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lea rdx, [r8+rax*8-32]
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mov rcx, rax
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mov r8d, dword [rsp+stack_use+40]
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mov rbx, 4
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sub rbx, rcx
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mov rcx, 64
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sub rcx, r8
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mov r12, 0
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mov rax, 0
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mov r8, [rdx+rbx*8]
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cmp rbx, 0
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jge L_skiplp
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xalign 16
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L_lp:
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mov r9, [rdx+rbx*8+8]
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mov r10, [rdx+rbx*8+16]
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mov r11, [rdx+rbx*8+24]
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shrd r12, r8, cl
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shrd r8, r9, cl
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shrd r9, r10, cl
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shrd r10, r11, cl
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sahf
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adc r12, [rsi+rbx*8]
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mov [rdi+rbx*8], r12
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adc r8, [rsi+rbx*8+8]
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mov r12, r11
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mov [rdi+rbx*8+8], r8
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adc r9, [rsi+rbx*8+16]
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adc r10, [rsi+rbx*8+24]
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mov [rdi+rbx*8+24], r10
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mov [rdi+rbx*8+16], r9
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lahf
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mov r8, [rdx+rbx*8+32]
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add rbx, 4
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jnc L_lp
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xalign 16
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L_skiplp:
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cmp rbx, 2
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ja L_case0
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je L_case1
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jp L_case2
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L_case3:
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shrd r12, r8, cl
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mov r9, [rdx+rbx*8+8]
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mov r10, [rdx+rbx*8+16]
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mov r11, [rdx+rbx*8+24]
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shrd r8, r9, cl
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shrd r9, r10, cl
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shrd r10, r11, cl
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sahf
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adc r12, [rsi+rbx*8]
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mov [rdi+rbx*8], r12
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adc r8, [rsi+rbx*8+8]
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mov r12, r11
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mov [rdi+rbx*8+8], r8
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adc r9, [rsi+rbx*8+16]
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adc r10, [rsi+rbx*8+24]
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mov [rdi+rbx*8+24], r10
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mov [rdi+rbx*8+16], r9
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lahf
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shr r12, cl
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sahf
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adc r12, 0
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mov rax, r12
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jmp L_xit
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L_case2:
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shrd r12, r8, cl
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mov r9, [rdx+rbx*8+8]
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shrd r8, r9, cl
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mov r10, [rdx+rbx*8+16]
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shrd r9, r10, cl
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shr r10, cl
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sahf
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adc r12, [rsi+rbx*8]
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mov [rdi+rbx*8], r12
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adc r8, [rsi+rbx*8+8]
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mov rax, 0
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mov [rdi+rbx*8+8], r8
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adc r9, [rsi+rbx*8+16]
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adc rax, r10
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mov [rdi+rbx*8+16], r9
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jmp L_xit
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L_case1:
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shrd r12, r8, cl
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mov r9, [rdx+rbx*8+8]
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shrd r8, r9, cl
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shr r9, cl
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sahf
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adc r12, [rsi+rbx*8]
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mov [rdi+rbx*8], r12
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adc r8, [rsi+rbx*8+8]
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mov rax, 0
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mov [rdi+rbx*8+8], r8
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adc rax, r9
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jmp L_xit
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L_case0:
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shrd r12, r8, cl
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shr r8, cl
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sahf
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adc r12, [rsi+rbx*8]
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mov [rdi+rbx*8], r12
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adc r8, 0
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mov rax, r8
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L_xit:
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END_PROC reg_save_list
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end
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