80 lines
3.2 KiB
C
80 lines
3.2 KiB
C
/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
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Copyright 1991, 1992, 1993, 1994, 1996, 1997, 1999, 2000, 2001, 2002, 2003,
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2004, 2005 Free Software Foundation, Inc.
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Copyright 2013 William Hart
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU Lesser General Public License as published by
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the Free Software Foundation; either version 2.1 of the License, or (at your
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option) any later version.
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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License for more details.
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You should have received a copy of the GNU Lesser General Public License
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along with this file; see the file COPYING.LIB. If not, write to
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the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#if defined (__GNUC__) || defined(__INTEL_COMPILER)
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#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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__asm__ ("addq %5,%q1\n\tadcq %3,%q0" \
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: "=r" (sh), "=&r" (sl) \
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: "0" ((UDItype)(ah)), "rme" ((UDItype)(bh)), \
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"%1" ((UDItype)(al)), "rme" ((UDItype)(bl)))
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#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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__asm__ ("subq %5,%q1\n\tsbbq %3,%q0" \
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: "=r" (sh), "=&r" (sl) \
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: "0" ((UDItype)(ah)), "rme" ((UDItype)(bh)), \
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"1" ((UDItype)(al)), "rme" ((UDItype)(bl)))
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#define umul_ppmm(w1, w0, u, v) \
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__asm__ ("mulq %3" \
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: "=a" (w0), "=d" (w1) \
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: "%0" ((UDItype)(u)), "rm" ((UDItype)(v)))
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#define udiv_qrnnd(q, r, n1, n0, dx) /* d renamed to dx avoiding "=d" */\
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__asm__ ("divq %4" /* stringification in K&R C */ \
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: "=a" (q), "=d" (r) \
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: "0" ((UDItype)(n0)), "1" ((UDItype)(n1)), "rm" ((UDItype)(dx)))
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#define add_333(sh, sm, sl, ah, am, al, bh, bm, bl) \
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__asm__ ("addq %8,%q2\n\tadcq %6,%q1\n\tadcq %4,%q0" \
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: "=r" (sh), "=r" (sm), "=&r" (sl) \
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: "0" ((UDItype)(ah)), "rme" ((UDItype)(bh)), \
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"1" ((UDItype)(am)), "rme" ((UDItype)(bm)), \
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"2" ((UDItype)(al)), "rme" ((UDItype)(bl)))
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#define sub_333(sh, sm, sl, ah, am, al, bh, bm, bl) \
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__asm__ ("subq %8,%q2\n\tsbbq %6,%q1\n\tsbbq %4,%q0" \
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: "=r" (sh), "=r" (sm), "=&r" (sl) \
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: "0" ((UDItype)(ah)), "rme" ((UDItype)(bh)), \
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"1" ((UDItype)(am)), "rme" ((UDItype)(bm)), \
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"2" ((UDItype)(al)), "rme" ((UDItype)(bl)))
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/* bsrq destination must be a 64-bit register, hence UDItype for __cbtmp. */
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#define count_leading_zeros(count, x) \
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do { \
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UDItype __cbtmp; \
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ASSERT ((x) != 0); \
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__asm__ ("bsrq %1,%0" : "=r" (__cbtmp) : "rm" ((UDItype)(x))); \
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(count) = __cbtmp ^ 63; \
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} while (0)
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/* bsfq destination must be a 64-bit register, "%q0" forces this in case
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count is only an int. */
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#define count_trailing_zeros(count, x) \
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do { \
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ASSERT ((x) != 0); \
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__asm__ ("bsfq %1,%q0" : "=r" (count) : "rm" ((UDItype)(x))); \
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} while (0)
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#endif
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#if !defined(BSWAP_LIMB) && defined (__GNUC__)
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#define BSWAP_LIMB(dst, src) \
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do { \
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__asm__ ("bswap %q0" : "=r" (dst) : "0" (src)); \
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} while (0)
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#endif
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