694af0fc34
1. Add tune/speed build capability 2. Add JM's Core2 code
427 lines
8.3 KiB
NASM
427 lines
8.3 KiB
NASM
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; Core2 mpn_sqr_basecase -- square an mpn number.
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; Version 1.0.4.
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;
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; Copyright 2008 Jason Moxham
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;
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; Windows Conversion Copyright 2008 Brian Gladman
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;
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; This file is part of the MPIR Library.
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; The MPIR Library is free software; you can redistribute it and/or modify
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; it under the terms of the GNU Lesser General Public License as published
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; by the Free Software Foundation; either verdxon 2.1 of the License, or (at
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; your option) any later verdxon.
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; The MPIR Library is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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; License for more details.
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; You should have received a copy of the GNU Lesser General Public License
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; along with the MPIR Library; see the file COPYING.LIB. If not, write
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; to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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; Boston, MA 02110-1301, USA.
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;
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; Calling interface:
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;
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; void mpn_sqr_basecase(
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; mp_ptr dst, rcx
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; mp_srcptr src, rdx
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; mp_size_t size r8
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; )
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;
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; Squuare src[size] and write the result to dst[2 * size]
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;
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; This is an SEH frame function with a leaf prologue
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%macro mpn_mul_1_int 0
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mov r10d, 4
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sub r10, rdx
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mov r11d, 0
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jnc %%2
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alignb 16, nop
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%%1:mov rax, [rsi+r10*8+16]
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mov r9d, 0
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mul r13
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add r11, rax
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mov [rdi+r10*8+16], r11
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mov rax, [rsi+r10*8+24]
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adc r9, rdx
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mul r13
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mov r11d, 0
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add r9, rax
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mov rax, [rsi+r10*8+32]
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adc r11, rdx
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mul r13
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mov [rdi+r10*8+24], r9
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add r11, rax
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mov r9d, 0
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mov [rdi+r10*8+32], r11
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mov rax, [rsi+r10*8+40]
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mov r11d, 0
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adc r9, rdx
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mul r13
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add r9, rax
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mov [rdi+r10*8+40], r9
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adc r11, rdx
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add r10, 4
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jnc %%1
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%%2:test r10, 2
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jnz %%3
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mov rax, [rsi+r10*8+16]
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mov r9d, 0
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mul r13
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add r11, rax
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mov [rdi+r10*8+16], r11
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mov rax, [rsi+r10*8+24]
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adc r9, rdx
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mul r13
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mov r11d, 0
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add r9, rax
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adc r11, rdx
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add r10, 2
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mov [rdi+r10*8+8], r9
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%%3:test r10, 1
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jnz %%4
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mov rax, [rsi+r10*8+16]
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mov r9d, 0
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mul r13
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add r11, rax
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adc r9, rdx
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mov [rdi+r10*8+24], r9
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%%4:mov [rdi+r10*8+16], r11
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%endmacro
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; changes from standard mpn_addmul_1 internal loop
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; change lables
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; change r8 to r12 , rcx to r13
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%macro addmulloop 1
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alignb 16, nop
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%%1:mov r10d, 0
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mul r13
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add [rdi+r11*8], r12
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adc r9, rax
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [rdi+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov rax, [rsi+r11*8+24]
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mov r12d, 0
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mov r9d, 0
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mul r13
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add [rdi+r11*8+16], r10
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adc rbx, rax
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adc r12, rdx
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mov rax, [rsi+r11*8+32]
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mul r13
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add [rdi+r11*8+24], rbx
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adc r12, rax
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adc r9, rdx
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add r11, 4
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mov rax, [rsi+r11*8+8]
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jnc %%1
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%endmacro
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%macro addmulnext0 0
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; here is 3 loads ie if r11=0
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mov r10d, 0
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mul r13
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add [rdi+r11*8], r12
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adc r9, rax
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [rdi+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov rax, [rsi+r11*8+24]
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mov r12d, 0
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mov r9d, 0
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mul r13
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add [rdi+r11*8+16], r10
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adc rbx, rax
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adc r12, rdx
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mov rax, [rsi+r11*8+32]
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mul r13
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add [rdi+r11*8+24], rbx
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adc r12, rax
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adc r9, rdx
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add [rdi+r11*8+32], r12
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adc r9, 0
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mov [rdi+r11*8+40], r9
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%endmacro
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%macro addmulnext1 0
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; here is 2 loads ie if r11=1
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mov r10d, 0
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mul r13
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add [rdi+r11*8], r12
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adc r9, rax
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [rdi+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov rax, [rsi+r11*8+24]
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mov r12d, 0
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mul r13
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add [rdi+r11*8+16], r10
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adc rbx, rax
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adc r12, rdx
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add [rdi+r11*8+24], rbx
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adc r12, 0
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mov [rdi+r11*8+32], r12
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%endmacro
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%macro addmulnext2 0
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; here is 1 load ie if r11=2
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mov r10d, 0
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mul r13
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add [rdi+r11*8], r12
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adc r9, rax
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [rdi+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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add [rdi+r11*8+16], r10
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adc rbx, 0
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mov [rdi+r11*8+24], rbx
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%endmacro
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%macro addmulnext3 0
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; here is 0 loads ie if r11=3
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mov r10d, 0
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mul r13
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add [rdi+r11*8], r12
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adc r9, rax
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adc r10, rdx
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add [rdi+r11*8+8], r9
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adc r10, 0
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mov [rdi+r11*8+16], r10
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%endmacro
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; changes from standard addmul_1
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; change lables
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; change r8 to r12
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; write top limb ax straight to mem dont return (NOTE we WRITE NOT ADD)
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; remove one limb special case
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; remove push/pop , basecase must save rbx
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; split into mod4 types and remove rets
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; surround with outer loop and pop ret
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; todo ----------- can ignore small values
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; this addmul MUST have a param whic is 0123 which is our r11
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%macro mpn_addmul_1_int 1
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%%1:mov rax, [rsi+r14*8]
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mov r13, [rsi+r14*8-8]
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mov r11, r14
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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jge %%2
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addmulloop %1
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%%2:addmulnext%1
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inc r14
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lea rdi, [rdi+8]
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cmp r14, 4
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jz .7
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%endmacro
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%include "..\x86_64_asm.inc"
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%define reg_save_list rbx, rsi, rdi, r12, r13, r14
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bits 64
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section .text
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global __gmpn_sqr_basecase
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%ifdef DLL
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export __gmpn_sqr_basecase
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%endif
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__gmpn_sqr_basecase:
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cmp r8d, 3
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jnb .3
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jp .2
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.1: mov rax, [rdx]
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mul rax
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mov [rcx], rax
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mov [rcx+8], rdx
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ret
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.2: mov rax, [rdx]
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mov r9, [rdx+8]
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mov r8, rax
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mul rax
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mov [rcx], rax
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mov rax, r9
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mov [rcx+8], rdx
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mul rax
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mov [rcx+16], rax
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mov rax, r8
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mov r10, rdx
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mul r9
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add rax, rax
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adc rdx, rdx
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adc r10, 0
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add [rcx+8], rax
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adc [rcx+16], rdx
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adc r10, 0
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mov [rcx+24], r10
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ret
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.3 ja sqr_main
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prologue sqr_3, 0, rsi, rdi
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mov rsi, rdx
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mov r8, [rsi]
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mov rax, [rsi+8]
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mul r8
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mov r11d, 0
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mov [rcx+8], rax
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mov rax, [rsi+16]
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mov r9, rdx
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mul r8
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mov r8, [rsi+8]
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add r9, rax
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mov rax, [rsi+16]
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adc r11, rdx
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mul r8
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mov [rcx+16], r9
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add r11, rax
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mov r9d, 0
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mov [rcx+24], r11
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adc r9, rdx
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mov [rcx+32], r9
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mov edi, 3
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xor r10, r10
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xor r11, r11
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lea rsi, [rsi+24]
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mov [rcx], r11
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mov [rcx+40], r11
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neg rdi
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.4: mov rax, [rsi+rdi*8]
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mul rax
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mov r8, [rcx]
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mov r9, [rcx+8]
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add r10, 1
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adc r8, r8
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adc r9, r9
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sbb r10, r10
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add r11, 1
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adc r8, rax
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adc r9, rdx
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sbb r11, r11
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mov [rcx], r8
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mov [rcx+8], r9
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add rdi, 1
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lea rcx, [rcx+16]
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jnz .4
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epilogue rsi, rdi
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; this code can not handle cases 3,2,1
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prologue sqr_main, 0, reg_save_list
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mov rdi, rcx
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mov rsi, rdx
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mov edx, r8d
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mov [rsp+stack_use+24], rdi ; use shadow area
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mov [rsp+stack_use+16], rsi
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mov [rsp+stack_use+ 8], rdx
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mov r13, [rsi]
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mov r14d, 7
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sub r14, rdx
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lea rdi, [rdi+rdx*8-40]
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lea rsi, [rsi+rdx*8-40]
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mpn_mul_1_int
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lea rdi, [rdi+8]
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mov rax, r14
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and rax, 3
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je .60
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jp .63
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cmp rax, 1
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je .61
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alignb 16, nop
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.6:
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.62:mpn_addmul_1_int 2
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.63:mpn_addmul_1_int 3
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.60:mpn_addmul_1_int 0
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.61:mpn_addmul_1_int 1
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jmp .6
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; only need to add .1 more line here
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.7: mov rax, [rsi+r14*8]
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mov r13, [rsi+r14*8-8]
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mul r13
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add [rdi+r14*8], rax
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adc rdx, 0
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mov [rdi+r14*8+8], rdx
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; now lsh by 1 and add in the diagonal
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mov rcx, [rsp + stack_use + 8] ; use shadow area
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mov rsi, [rsp + stack_use + 16]
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mov rdi, [rsp + stack_use + 24]
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.8: xor rbx, rbx
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xor r14, r14
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lea rsi, [rsi+rcx*8]
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mov [rdi], r14
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lea r10, [rdi+rcx*8]
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mov [r10+rcx*8-8], r14
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neg rcx
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.9: mov rax, [rsi+rcx*8]
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mul rax
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mov r8, [rdi]
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mov r9, [rdi+8]
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add rbx, 1
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adc r8, r8
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adc r9, r9
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sbb rbx, rbx
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add r14, 1
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adc r8, rax
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adc r9, rdx
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sbb r14, r14
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mov [rdi], r8
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mov [rdi+8], r9
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add rcx, 1
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lea rdi, [rdi+16]
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jnz .9
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.10:epilogue reg_save_list
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end
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