420 lines
7.8 KiB
ActionScript
420 lines
7.8 KiB
ActionScript
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; core2 mpn_redc_basecase
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; Copyright 2009 Jason Moxham
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; This file is part of the MPIR Library.
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; The MPIR Library is free software; you can redistribute it and/or modify
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; it under the terms of the GNU Lesser General Public License as published
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; by the Free Software Foundation; either version 2.1 of the License, or (at
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; your option) any later version.
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; The MPIR Library is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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; License for more details.
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; You should have received a copy of the GNU Lesser General Public License
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; along with the MPIR Library; see the file COPYING.LIB. If not, write
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; to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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; Boston, MA 02110-1301, USA.
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%include 'yasm_mac.inc'
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; (rdi, rcx) = (rsi, rcx) + (rdx, rcx) with the carry flag set for the carry
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; this is the usual mpn_add_n with the final dec rax;adc rax,rax;ret removed
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; and a jump where we have two rets
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%macro mpn_add 0
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mov rax, rcx
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and rax, 3
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shr rcx, 2
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cmp rcx, 0
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; carry flag is clear here
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jnz %%1
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mov r11, [rsi]
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add r11, [rdx]
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mov [rdi], r11
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dec rax
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jz %%2
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mov r11, [rsi+8]
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adc r11, [rdx+8]
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mov [rdi+8], r11
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dec rax
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jz %%2
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mov r11, [rsi+16]
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adc r11, [rdx+16]
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mov [rdi+16], r11
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jmp %%2
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align 16
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%%1:
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mov r11, [rsi]
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mov r8, [rsi+8]
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lea rsi, [rsi+32]
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adc r11, [rdx]
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adc r8, [rdx+8]
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lea rdx, [rdx+32]
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mov [rdi], r11
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mov [rdi+8], r8
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lea rdi, [rdi+32]
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mov r9, [rsi-16]
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mov r10, [rsi-8]
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adc r9, [rdx-16]
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adc r10, [rdx-8]
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mov [rdi-16], r9
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dec rcx
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mov [rdi-8], r10
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jnz %%1
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inc rax
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dec rax
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jz %%2
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mov r11, [rsi]
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adc r11, [rdx]
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mov [rdi], r11
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dec rax
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jz %%2
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mov r11, [rsi+8]
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adc r11, [rdx+8]
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mov [rdi+8], r11
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dec rax
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jz %%2
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mov r11, [rsi+16]
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adc r11, [rdx+16]
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mov [rdi+16], r11
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%%2:
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%endmacro
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; (rbx, rbp) = (rsi, rbp) - (rdx, rbp)
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%macro mpn_sub 0
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mov rax, rbp
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and rax, 3
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shr rbp, 2
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cmp rbp, 0
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; carry flag is clear here
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jnz %%1
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mov r11, [rsi]
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sub r11, [rdx]
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mov [rbx], r11
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dec rax
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jz %%2
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mov r11, [rsi+8]
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sbb r11, [rdx+8]
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mov [rbx+8], r11
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dec rax
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jz %%2
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mov r11, [rsi+16]
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sbb r11, [rdx+16]
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mov [rbx+16], r11
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jmp %%2
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align 16
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%%1:
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mov r11, [rsi]
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mov r8, [rsi+8]
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lea rsi, [rsi+32]
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sbb r11, [rdx]
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sbb r8, [rdx+8]
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lea rdx, [rdx+32]
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mov [rbx], r11
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mov [rbx+8], r8
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lea rbx, [rbx+32]
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mov r9, [rsi-16]
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mov r10, [rsi-8]
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sbb r9, [rdx-16]
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sbb r10, [rdx-8]
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mov [rbx-16], r9
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dec rbp
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mov [rbx-8], r10
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jnz %%1
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inc rax
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dec rax
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jz %%2
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mov r11, [rsi]
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sbb r11, [rdx]
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mov [rbx], r11
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dec rax
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jz %%2
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mov r11, [rsi+8]
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sbb r11, [rdx+8]
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mov [rbx+8], r11
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dec rax
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jz %%2
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mov r11, [rsi+16]
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sbb r11, [rdx+16]
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mov [rbx+16], r11
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%%2:
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%endmacro
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; changes from standard addmul
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; change r8 to r12 and rcx to r13 and rdi to r8
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; reemove ret and write last limb but to beginning
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%macro addmulloop 1
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align 16
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%%1:
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mov r10, 0
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mul r13
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add [r8+r11*8], r12
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adc r9, rax
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db 0x26
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [r8+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov rax, [rsi+r11*8+24]
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mov r12, 0
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mov r9, 0
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mul r13
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add [r8+r11*8+16], r10
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db 0x26
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adc rbx, rax
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db 0x26
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adc r12, rdx
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mov rax, [rsi+r11*8+32]
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mul r13
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add [r8+r11*8+24], rbx
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db 0x26
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adc r12, rax
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db 0x26
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adc r9, rdx
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add r11, 4
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mov rax, [rsi+r11*8+8]
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jnc %%1
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%endmacro
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%macro addmulpropro0 0
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imul r13, rcx
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lea r8, [r8-8]
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%endmacro
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%macro addmulpro0 0
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mov r11, r14
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lea r8, [r8+8]
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mov rax, [rsi+r14*8]
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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%endmacro
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%macro addmulnext0 0
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mov r10d, 0
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mul r13
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add [r8+r11*8], r12
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adc r9, rax
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [r8+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov rax, [rsi+r11*8+24]
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mov r12d, 0
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mov r9d, 0
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mul r13
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add [r8+r11*8+16], r10
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adc rbx, rax
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adc r12, rdx
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mov rax, [rsi+r11*8+32]
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mul r13
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add [r8+r11*8+24], rbx
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mov r13, [r8+r14*8+8]
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adc r12, rax
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adc r9, rdx
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imul r13, rcx
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add [r8+r11*8+32], r12
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adc r9, 0
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sub r15, 1
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mov [r8+r14*8], r9
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%endmacro
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%macro addmulpropro1 0
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%endmacro
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%macro addmulpro1 0
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imul r13, rcx
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mov rax, [rsi+r14*8]
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mov r11, r14
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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%endmacro
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%macro addmulnext1 0
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mov r10d, 0
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mul r13
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add [r8+r11*8], r12
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adc r9, rax
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [r8+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov rax, [rsi+r11*8+24]
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mov r12d, 0
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mul r13
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add [r8+r11*8+16], r10
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adc rbx, rax
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adc r12, rdx
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add [r8+r11*8+24], rbx
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mov r13, [r8+r14*8+8]
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adc r12, 0
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sub r15, 1
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mov [r8+r14*8], r12
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lea r8, [r8+8]
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%endmacro
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%macro addmulpropro2 0
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%endmacro
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%macro addmulpro2 0
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imul r13, rcx
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mov rax, [rsi+r14*8]
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mov r11, r14
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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%endmacro
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%macro addmulnext2 0
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mul r13
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add [r8+r11*8], r12
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adc r9, rax
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mov r10d, 0
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [r8+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov r13, [r8+r14*8+8]
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add [r8+r11*8+16], r10
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adc rbx, 0
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mov [r8+r14*8], rbx
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sub r15, 1
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lea r8, [r8+8]
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%endmacro
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%macro addmulpropro3 0
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%endmacro
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%macro addmulpro3 0
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imul r13, rcx
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mov rax, [rsi+r14*8]
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mov r11, r14
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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%endmacro
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%macro addmulnext3 0
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mul r13
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add [r8+r11*8], r12
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adc r9, rax
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mov r10d, 0
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adc r10, rdx
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add [r8+r11*8+8], r9
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adc r10, 0
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mov r13, [r8+r14*8+8]
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mov [r8+r14*8], r10
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lea r8, [r8+8]
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sub r15, 1
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%endmacro
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; change r8 to r12
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; write top limb ax straight to mem dont return (NOTE we WRITE NOT ADD)
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%macro mpn_addmul_1_int 1
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addmulpropro%1
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align 16
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%%1:
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addmulpro%1
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jge %%2
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addmulloop %1
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%%2:
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addmulnext%1
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jnz %%1
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jmp end
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%endmacro
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BITS 64
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GLOBAL_FUNC mpn_redc_basecase
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cmp rdx, 1
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je one
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push r13
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push r14
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push rbx
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push r12
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push r15
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push rbp
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mov r14, 5
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sub r14, rdx
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; store copys
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push rsi
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push r8
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lea r8, [r8+rdx*8-40]
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lea rsi, [rsi+rdx*8-40]
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mov rbp, rdx
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mov r15, rdx
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mov rax, r14
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and rax, 3
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mov r13, [r8+r14*8]
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je case0
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jp case3
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cmp rax, 1
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je case1
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case2:
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mpn_addmul_1_int 2
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align 16
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case0:
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mpn_addmul_1_int 0
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align 16
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case1:
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mpn_addmul_1_int 1
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align 16
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case3:
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mpn_addmul_1_int 3
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align 16
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end:
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mov rcx, rbp
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pop rdx
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lea rsi, [rdx+rbp*8]
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mov rbx, rdi
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mpn_add
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; mpnadd(rdi,rsi,rdx,rcx)
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pop rdx
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jnc skip
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mov rsi, rbx
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mpn_sub
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; mpn_sub_n(rbx,rsi,rdx,rbp) we can certainly improve this sub
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skip:
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pop rbp
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pop r15
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pop r12
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pop rbx
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pop r14
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pop r13
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ret
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align 16
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one:
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mov r9, [r8]
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mov r11, [rsi]
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imul rcx, r9
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mov rax, rcx
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mul r11
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add rax, r9
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; rax is zero here
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adc rdx, [r8+8]
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cmovnc r11, rax
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sub rdx, r11
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mov [rdi], rdx
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ret
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