400 lines
7.6 KiB
ActionScript
400 lines
7.6 KiB
ActionScript
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; core2 mpn_mul_basecase
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; Copyright 2008,2009 Jason Moxham
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; This file is part of the MPIR Library.
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; The MPIR Library is free software; you can redistribute it and/or modify
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; it under the terms of the GNU Lesser General Public License as published
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; by the Free Software Foundation; either version 2.1 of the License, or (at
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; your option) any later version.
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; The MPIR Library is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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; License for more details.
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; You should have received a copy of the GNU Lesser General Public License
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; along with the MPIR Library; see the file COPYING.LIB. If not, write
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; to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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; Boston, MA 02110-1301, USA.
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%include 'yasm_mac.inc'
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; (rdi, rdx + r8) = (rsi, rdx)*(rcx, r8)
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; same as the addmul for now
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; changes from standard mul
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; change r8 to r12 and rcx to r13
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; reemove ret and write last limb
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%macro mulloop 1
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align 16
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%%1:
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mov r10, 0
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mul r13
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mov [rdi+r11*8], r12
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add r9, rax
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db 0x26
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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mov [rdi+r11*8+8], r9
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add r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov rax, [rsi+r11*8+24]
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mov r12, 0
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mov r9, 0
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mul r13
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mov [rdi+r11*8+16], r10
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db 0x26
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add rbx, rax
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db 0x26
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adc r12, rdx
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mov rax, [rsi+r11*8+32]
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mul r13
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mov [rdi+r11*8+24], rbx
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db 0x26
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add r12, rax
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db 0x26
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adc r9, rdx
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add r11, 4
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mov rax, [rsi+r11*8+8]
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jnc %%1
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%endmacro
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%macro mulnext0 0
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mov rax, [rsi+r11*8+16]
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mul r13
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mov [rdi+r11*8+8], r9
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add r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov rax, [rsi+r11*8+24]
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mov r12d, 0
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mul r13
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mov [rdi+r11*8+16], r10
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add rbx, rax
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adc r12, rdx
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mov rax, [rsi+r11*8+32]
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mul r13
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mov [rdi+r11*8+24], rbx
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add r12, rax
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adc rdx, 0
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mov [rdi+r11*8+32], r12
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mov [rdi+r11*8+40], rdx
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add r8, 1
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mov rax, [rsi+r14*8]
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mov r11, r14
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%endmacro
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%macro mulnext1 0
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mov rax, [rsi+r11*8+16]
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mul r13
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mov [rdi+r11*8+8], r9
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add r10, rax
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mov r12d, 0
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adc r12, rdx
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mov rax, [rsi+r11*8+24]
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mul r13
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mov [rdi+r11*8+16], r10
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add r12, rax
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adc rdx, 0
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mov [rdi+r11*8+24], r12
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mov [rdi+r11*8+32], rdx
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add r8, 1
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lea rdi, [rdi+8]
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%endmacro
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%macro mulnext2 0
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mov rax, [rsi+r11*8+16]
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mul r13
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mov [rdi+r11*8+8], r9
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add r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov [rdi+r11*8+16], r10
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mov [rdi+r11*8+24], rbx
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add r8, 1
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mov rax, [rsi+r14*8]
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mov r11, r14
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%endmacro
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%macro mulnext3 0
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mov [rdi+r11*8+8], r9
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mov [rdi+r11*8+16], r10
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add r8, 1
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lea rdi, [rdi+8]
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%endmacro
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; changes from standard addmul
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; change r8 to r12 and rcx to r13
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; reemove ret and write last limb
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%macro addmulloop 1
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align 16
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%%1:
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mov r10, 0
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mul r13
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add [rdi+r11*8], r12
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adc r9, rax
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db 0x26
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [rdi+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov rax, [rsi+r11*8+24]
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mov r12, 0
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mov r9, 0
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mul r13
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add [rdi+r11*8+16], r10
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db 0x26
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adc rbx, rax
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db 0x26
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adc r12, rdx
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mov rax, [rsi+r11*8+32]
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mul r13
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add [rdi+r11*8+24], rbx
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db 0x26
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adc r12, rax
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db 0x26
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adc r9, rdx
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add r11, 4
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mov rax, [rsi+r11*8+8]
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jnc %%1
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%endmacro
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%macro addmulpro0 0
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mov r13, [rcx+r8*8]
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lea rdi, [rdi+8]
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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%endmacro
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%macro addmulnext0 0
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mov r10d, 0
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mul r13
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add [rdi+r11*8], r12
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adc r9, rax
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [rdi+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov rax, [rsi+r11*8+24]
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mov r12d, 0
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mul r13
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add [rdi+r11*8+16], r10
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adc rbx, rax
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adc r12, rdx
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mov rax, [rsi+r11*8+32]
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mul r13
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add [rdi+r11*8+24], rbx
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adc r12, rax
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adc rdx, 0
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add [rdi+r11*8+32], r12
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mov rax, [rsi+r14*8]
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adc rdx, 0
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add r8, 1
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mov [rdi+r11*8+40], rdx
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mov r11, r14
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%endmacro
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%macro addmulpro1 0
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mov rax, [rsi+r14*8]
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mov r13, [rcx+r8*8]
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mov r11, r14
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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%endmacro
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%macro addmulnext1 0
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mov r10d, 0
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mul r13
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add [rdi+r11*8], r12
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adc r9, rax
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [rdi+r11*8+8], r9
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adc r10, rax
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mov r12d, 0
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adc r12, rdx
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mov rax, [rsi+r11*8+24]
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mul r13
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add [rdi+r11*8+16], r10
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adc r12, rax
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adc rdx, 0
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add [rdi+r11*8+24], r12
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adc rdx, 0
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mov [rdi+r11*8+32], rdx
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add r8, 1
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lea rdi, [rdi+8]
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%endmacro
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%macro addmulpro2 0
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mov r13, [rcx+r8*8]
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lea rdi, [rdi+8]
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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%endmacro
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%macro addmulnext2 0
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mov r10d, 0
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mul r13
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add [rdi+r11*8], r12
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adc r9, rax
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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mov ebx, 0
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add [rdi+r11*8+8], r9
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adc r10, rax
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adc rbx, rdx
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mov rax, [rsi+r14*8]
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add [rdi+r11*8+16], r10
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adc rbx, 0
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mov [rdi+r11*8+24], rbx
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add r8, 1
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mov r11, r14
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%endmacro
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%macro addmulpro3 0
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mov rax, [rsi+r14*8]
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mov r13, [rcx+r8*8]
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mov r11, r14
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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%endmacro
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%macro addmulnext3 0
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mul r13
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add [rdi+r11*8], r12
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adc r9, rax
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mov r10d, 0
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adc r10, rdx
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add [rdi+r11*8+8], r9
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adc r10, 0
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mov [rdi+r11*8+16], r10
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add r8, 1
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lea rdi, [rdi+8]
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%endmacro
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%macro mpn_muladdmul_1_int 1
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mulnext%1
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jz %%3
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align 16
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%%1:
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addmulpro%1
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jge %%2
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addmulloop %1
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%%2:
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addmulnext%1
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jnz %%1
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%%3:
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mov r13, [rsp-8]
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mov r14, [rsp-16]
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mov rbx, [rsp-24]
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mov r12, [rsp-32]
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ret
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%endmacro
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BITS 64
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GLOBAL_FUNC mpn_mul_basecase
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; the current mul does not handle case one
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cmp rdx, 2
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jz two
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jb one
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mov [rsp-8], r13
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mov [rsp-16], r14
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mov [rsp-24], rbx
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mov [rsp-32], r12
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mov r14, 5
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sub r14, rdx
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lea rdi, [rdi+rdx*8-40]
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lea rcx, [rcx+r8*8]
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neg r8
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lea rsi, [rsi+rdx*8-40]
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mov rax, [rsi+r14*8]
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mov r13, [rcx+r8*8]
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mov r11, r14
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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jge mulskiploop
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mulloop 1
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mulskiploop:
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mov r10d, 0
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mul r13
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mov [rdi+r11*8], r12
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add r9, rax
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adc r10, rdx
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cmp r11, 2
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ja case3
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jz case2
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jp case1
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case0:
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mpn_muladdmul_1_int 0
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align 16
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case1:
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mpn_muladdmul_1_int 1
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align 16
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case2:
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mpn_muladdmul_1_int 2
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align 16
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case3:
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mpn_muladdmul_1_int 3
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align 16
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one:
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mov rax, [rsi]
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mul qword [rcx]
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mov [rdi], rax
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mov [rdi+8], rdx
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ret
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align 16
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two:
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mov r10, [rcx]
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mov rax, [rsi]
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mul r10
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mov [rdi], rax
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mov rax, [rsi+8]
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mov r9, rdx
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mul r10
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add r9, rax
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adc rdx, 0
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mov [rdi+8], r9
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mov [rdi+16], rdx
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cmp r8, 2
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jz twobytwo
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ret
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twobytwo:
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mov r9d, 0
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mov r10, [rcx+8]
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mov rax, [rsi]
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mul r10
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add [rdi+8], rax
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mov rax, [rsi+8]
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adc r9, rdx
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mul r10
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add r9, rax
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adc rdx, 0
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add [rdi+16], r9
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adc rdx, 0
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mov [rdi+24], rdx
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ret
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