4491e7b7da
This let configure define correct HAVE_NATIVE_* constants. This may break the VS builds.
150 lines
4.1 KiB
NASM
150 lines
4.1 KiB
NASM
; PROLOGUE(mpn_mul_1)
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; Copyright 2011 The Code Cavern
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;
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; Windows Conversion Copyright 2011 Brian Gladman
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;
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; This file is part of the MPIR Library.
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; The MPIR Library is free software; you can redistribute it and/or modify
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; it under the terms of the GNU Lesser General Public License as published
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; by the Free Software Foundation; either version 2.1 of the License, or (at
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; your option) any later version.
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; The MPIR Library is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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; License for more details.
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; You should have received a copy of the GNU Lesser General Public License
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; along with the MPIR Library; see the file COPYING.LIB. If not, write
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; to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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; Boston, MA 02110-1301, USA.
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;
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; mp_limb_t mpn_mul_1(mp_ptr, mp_ptr, mp_size_t, mp_limb_t)
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; mp_limb_t mpn_mul_1c(mp_ptr, mp_ptr, mp_size_t, mp_limb_t, mp_limb_t)
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; rax rdi rsi rdx rcx r8
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; rax rcx rdx r8 r9 [rsp+40]
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%include "yasm_mac.inc"
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CPU Athlon64
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BITS 64
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%define reg_save_list rsi, rdi, r12
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LEAF_PROC mpn_mul_1
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mov rax, [rdx]
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cmp r8, 1
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jne .1
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mul r9
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mov [rcx], rax
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mov rax, rdx
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ret
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.1: FRAME_PROC ?mpn_k8_mul, 0, reg_save_list
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mov r11, 5
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lea rsi, [rdx+r8*8-40]
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lea rdi, [rcx+r8*8-40]
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mov rcx, r9
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sub r11, r8
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mul rcx
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db 0x26
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mov r8, rax
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db 0x26
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mov rax, [rsi+r11*8+8]
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db 0x26
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mov r9, rdx
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db 0x26
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cmp r11, 0
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db 0x26
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mov [rsp-8], r12
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db 0x26
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jge .2
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.1: xor r10, r10
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mul rcx
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mov [rdi+r11*8], r8
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add r9, rax
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul rcx
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mov [rdi+r11*8+8], r9
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add r10, rax
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mov r12d, 0
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adc r12, rdx
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mov rax, [rsi+r11*8+24]
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xor r8, r8
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xor r9, r9
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mul rcx
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mov [rdi+r11*8+16], r10
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add r12, rax
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adc r8, rdx
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mov rax, [rsi+r11*8+32]
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mul rcx
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mov [rdi+r11*8+24], r12
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add r8, rax
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adc r9, rdx
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add r11, 4
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mov rax, [rsi+r11*8+8]
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jnc .1
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.2: xor r10, r10
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mul rcx
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mov [rdi+r11*8], r8
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add r9, rax
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adc r10, rdx
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cmp r11, 2
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ja .5
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jz .4
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jp .3
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mov rax, [rsi+16]
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mul rcx
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mov [rdi+8], r9
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add r10, rax
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mov r12d, 0
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adc r12, rdx
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mov rax, [rsi+24]
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xor r8, r8
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xor r9, r9
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mul rcx
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mov [rdi+16], r10
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add r12, rax
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adc r8, rdx
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mov rax, [rsi+32]
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mul rcx
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mov [rdi+24], r12
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add r8, rax
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adc r9, rdx
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mov [rdi+32], r8
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mov rax, r9
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EXIT_PROC reg_save_list
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.3: mov rax, [rsi+24]
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mul rcx
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mov [rdi+16], r9
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add r10, rax
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mov r12d, 0
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adc r12, rdx
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mov rax, [rsi+32]
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xor r8, r8
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mul rcx
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mov [rdi+24], r10
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add r12, rax
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adc r8, rdx
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mov [rdi+32], r12
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mov rax, r8
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EXIT_PROC reg_save_list
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align 16
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.4: mov rax, [rsi+32]
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mul rcx
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mov [rdi+24], r9
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add r10, rax
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mov r12d, 0
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adc r12, rdx
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mov [rdi+32], r10
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mov rax, r12
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EXIT_PROC reg_save_list
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.5: mov [rdi+32], r9
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mov rax, r10
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END_PROC reg_save_list
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end
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