mpir/mpn/x86_64/haswell
2016-12-07 19:02:22 +01:00
..
add_n.as Reduce number of registers used and use %defines for register names 2016-11-27 00:51:45 +01:00
addmul_1.as addmul_1 and submul_1, converted from GMP 2016-12-05 22:55:21 +01:00
com_n.as com_n, adapted from Nurmann's copyi code 2016-12-06 18:08:13 +01:00
copyd.as Revert "Temporarily removed due to bug" 2016-11-25 18:11:21 +01:00
copyi.as Bugfix: operand name macros were wrong 2016-11-25 18:11:38 +01:00
gmp-mparam.h Remove sb_div* small implementation (due to bug and due to being a very minor 2015-11-13 14:47:44 +00:00
lshift1.as Add vzeroupper to avoid stall on Haswell if SSE2 code follows 2016-11-22 15:03:02 +01:00
lshift.as AVX-based lshift for 4-issue Intel cpus (Haswell and newer) 2016-11-22 21:58:43 +01:00
mul_basecase.as Haswell mul_basecase from GMP 6.1.1, converted to Intel syntax 2016-12-01 12:39:26 +01:00
rshift1.as Add vzeroupper to avoid stall on Haswell if SSE2 code follows 2016-11-22 15:03:02 +01:00
rshift.as AVX-based rshift for 4-issue Intel cpus (Haswell and newer) 2016-11-22 23:18:52 +01:00
sqr_basecase.asm sqr_basecase from GMP 6.1.1 2016-12-07 19:02:22 +01:00
sub_n.as Version of mpn/x86_64/sandybridge/sub_n.as, super-optimized for Haswell 2016-11-28 19:43:46 +01:00
submul_1.as addmul_1 and submul_1, converted from GMP 2016-12-05 22:55:21 +01:00