9bf78f0866
2. Remove the now redundant 32 to 64 register mapping for mp_size_t inputs in Windows assembler
179 lines
4.2 KiB
NASM
179 lines
4.2 KiB
NASM
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; Version 1.0.4.
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;
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; Copyright 2008 Jason Moxham
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;
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; Windows Conversion Copyright 2008 Brian Gladman
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;
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; This file is part of the MPIR Library.
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; The MPIR Library is free software; you can redistribute it and/or modify
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; it under the terms of the GNU Lesser General Public License as published
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; by the Free Software Foundation; either version 2.1 of the License, or (at
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; your option) any later version.
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; The MPIR Library is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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; License for more details.
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; You should have received a copy of the GNU Lesser General Public License
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; along with the MPIR Library; see the file COPYING.LIB. If not, write
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; to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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; Boston, MA 02110-1301, USA.
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;
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; mp_limb_t mpn_rshift(mp_ptr, mp_ptr, mp_size_t, mp_uint)
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; rax rdi rsi rdx rcx
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; rax rcx rdx r8 r9d
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%include "..\..\yasm_mac.inc"
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CPU SSE4.2
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BITS 64
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LEAF_PROC mpn_rshift
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mov r10, rcx
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mov ecx, r9d
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cmp r8, 2
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ja .3
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jz .2
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.1:
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mov rdx, [rdx]
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mov rax, rdx
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shr rdx, cl
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neg rcx
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shl rax, cl
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mov [r10], rdx
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ret
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.2:
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mov r8, [rdx]
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mov r9, [rdx+8]
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mov rax, r8
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mov r11, r9
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shr r8, cl
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shr r9, cl
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neg rcx
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shl r11, cl
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shl rax, cl
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or r8, r11
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mov [r10], r8
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mov [r10+8], r9
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ret
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.3:
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mov r11, rdx
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mov rdx, r8
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mov eax, 64
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lea r9, [r11+8]
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sub rax, rcx
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and r9, -16
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movq xmm0, rcx
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movq xmm1, rax
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movdqa xmm5, [r9]
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movdqa xmm3, xmm5
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psllq xmm5, xmm1
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movq rax, xmm5
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cmp r11, r9
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lea r11, [r11+rdx*8-40]
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je .4
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movq xmm2, [r9-8]
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movq xmm4, xmm2
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psllq xmm2, xmm1
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psrlq xmm4, xmm0
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por xmm4, xmm5
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movq [r10], xmm4
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lea r10, [r10+8]
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dec rdx
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movq rax, xmm2
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.4:
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lea r10, [r10+rdx*8-40]
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psrlq xmm3, xmm0
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mov r8d, 5
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sub r8, rdx
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jnc .6
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xalign 16
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.5:
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movdqa xmm2, [r11+r8*8+16]
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movdqa xmm4, xmm2
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psllq xmm2, xmm1
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shufpd xmm5, xmm2, 1
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por xmm3, xmm5
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movq [r10+r8*8], xmm3
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movhpd [r10+r8*8+8], xmm3
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psrlq xmm4, xmm0
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movdqa xmm5, [r11+r8*8+32]
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movdqa xmm3, xmm5
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psllq xmm5, xmm1
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shufpd xmm2, xmm5, 1
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psrlq xmm3, xmm0
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por xmm4, xmm2
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movq [r10+r8*8+16], xmm4
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movhpd [r10+r8*8+24], xmm4
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add r8, 4
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jnc .5
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.6:
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cmp r8, 2
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ja .10
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jz .9
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jp .8
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.7:
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movdqa xmm2, [r11+r8*8+16]
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movdqa xmm4, xmm2
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psllq xmm2, xmm1
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shufpd xmm5, xmm2, 1
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por xmm3, xmm5
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movq [r10+r8*8], xmm3
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movhpd [r10+r8*8+8], xmm3
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psrlq xmm4, xmm0
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movq xmm5, [r11+r8*8+32]
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movq xmm3, xmm5
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psllq xmm5, xmm1
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shufpd xmm2, xmm5, 1
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psrlq xmm3, xmm0
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por xmm4, xmm2
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movq [r10+r8*8+16], xmm4
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movhpd [r10+r8*8+24], xmm4
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psrldq xmm5, 8
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por xmm3, xmm5
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movq [r10+r8*8+32], xmm3
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ret
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xalign 16
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.8:
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movdqa xmm2, [r11+r8*8+16]
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movdqa xmm4, xmm2
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psllq xmm2, xmm1
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shufpd xmm5, xmm2, 1
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por xmm3, xmm5
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movq [r10+r8*8], xmm3
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movhpd [r10+r8*8+8], xmm3
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psrlq xmm4, xmm0
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psrldq xmm2, 8
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por xmm4, xmm2
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movq [r10+r8*8+16], xmm4
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movhpd [r10+r8*8+24], xmm4
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ret
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xalign 16
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.9:
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movq xmm2, [r11+r8*8+16]
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movq xmm4, xmm2
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psllq xmm2, xmm1
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shufpd xmm5, xmm2, 1
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por xmm3, xmm5
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movq [r10+r8*8], xmm3
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movhpd [r10+r8*8+8], xmm3
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psrlq xmm4, xmm0
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psrldq xmm2, 8
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por xmm4, xmm2
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movq [r10+r8*8+16], xmm4
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ret
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xalign 16
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.10:
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psrldq xmm5, 8
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por xmm3, xmm5
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movq [r10+r8*8], xmm3
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movhpd [r10+r8*8+8], xmm3
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ret
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end
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