168 lines
5.6 KiB
C
168 lines
5.6 KiB
C
/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
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Copyright 1991, 1992, 1993, 1994, 1996, 1997, 1999, 2000, 2001, 2002, 2003,
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2004, 2005 Free Software Foundation, Inc.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU Lesser General Public License as published by
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the Free Software Foundation; either version 2.1 of the License, or (at your
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option) any later version.
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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License for more details.
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You should have received a copy of the GNU Lesser General Public License
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along with this file; see the file COPYING.LIB. If not, write to
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the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#if defined (__GNUC__) || defined(INTEL_COMPILER)
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#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
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__asm__ ("addl %5,%k1\n\tadcl %3,%k0" \
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: "=r" (sh), "=&r" (sl) \
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: "0" ((USItype)(ah)), "g" ((USItype)(bh)), \
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"%1" ((USItype)(al)), "g" ((USItype)(bl)))
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#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
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__asm__ ("subl %5,%k1\n\tsbbl %3,%k0" \
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: "=r" (sh), "=&r" (sl) \
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: "0" ((USItype)(ah)), "g" ((USItype)(bh)), \
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"1" ((USItype)(al)), "g" ((USItype)(bl)))
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#define umul_ppmm(w1, w0, u, v) \
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__asm__ ("mull %3" \
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: "=a" (w0), "=d" (w1) \
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: "%0" ((USItype)(u)), "rm" ((USItype)(v)))
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#define udiv_qrnnd(q, r, n1, n0, dx) /* d renamed to dx avoiding "=d" */\
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__asm__ ("divl %4" /* stringification in K&R C */ \
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: "=a" (q), "=d" (r) \
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: "0" ((USItype)(n0)), "1" ((USItype)(n1)), "rm" ((USItype)(dx)))
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#if __GMP_GNUC_PREREQ (3,4) /* using bsrl */
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#define count_leading_zeros(count,x) count_leading_zeros_gcc_clz(count,x)
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#endif /* gcc clz */
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#ifndef count_leading_zeros
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#define count_leading_zeros(count, x) \
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do { \
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USItype __cbtmp; \
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ASSERT ((x) != 0); \
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__asm__ ("bsrl %1,%0" : "=r" (__cbtmp) : "rm" ((USItype)(x))); \
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(count) = __cbtmp ^ 31; \
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} while (0)
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#endif /* asm bsrl */
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#if __GMP_GNUC_PREREQ (3,4) /* using bsfl */
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#define count_trailing_zeros(count,x) count_trailing_zeros_gcc_ctz(count,x)
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#endif /* gcc ctz */
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#ifndef count_trailing_zeros
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#define count_trailing_zeros(count, x) \
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do { \
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ASSERT ((x) != 0); \
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__asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x))); \
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} while (0)
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#endif /* asm bsfl */
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/* ASM_L gives a local label for a gcc asm block, for use when temporary
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local labels like "1:" might not be available, which is the case for
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instance on the x86s (the SCO assembler doesn't support them).
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The label generated is made unique by including "%=" which is a unique
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number for each insn. This ensures the same name can be used in multiple
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asm blocks, perhaps via a macro. Since jumps between asm blocks are not
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allowed there's no need for a label to be usable outside a single
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block. */
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#define ASM_L(name) LSYM_PREFIX "asm_%=_" #name
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#if ! WANT_ASSERT
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/* Better flags handling than the generic C gives on i386, saving a few
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bytes of code and maybe a cycle or two. */
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#define MPN_IORD_U(ptr, incr, aors) \
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do { \
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mp_ptr __ptr_dummy; \
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if (__builtin_constant_p (incr) && (incr) == 1) \
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{ \
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__asm__ __volatile__ \
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("\n" ASM_L(top) ":\n" \
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"\t" aors " $1, (%0)\n" \
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"\tleal 4(%0),%0\n" \
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"\tjc " ASM_L(top) \
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: "=r" (__ptr_dummy) \
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: "0" (ptr) \
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: "memory"); \
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} \
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else \
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{ \
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__asm__ __volatile__ \
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( aors " %2,(%0)\n" \
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"\tjnc " ASM_L(done) "\n" \
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ASM_L(top) ":\n" \
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"\t" aors " $1,4(%0)\n" \
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"\tleal 4(%0),%0\n" \
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"\tjc " ASM_L(top) "\n" \
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ASM_L(done) ":\n" \
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: "=r" (__ptr_dummy) \
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: "0" (ptr), \
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"ri" (incr) \
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: "memory"); \
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} \
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} while (0)
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#ifndef MPN_INCR_U
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#define MPN_INCR_U(ptr, size, incr) MPN_IORD_U (ptr, incr, "addl")
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#endif
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#ifndef MPN_DECR_U
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#define MPN_DECR_U(ptr, size, incr) MPN_IORD_U (ptr, incr, "subl")
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#endif
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#ifndef mpn_incr_u
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#define mpn_incr_u(ptr, incr) MPN_INCR_U (ptr, 0, incr)
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#endif
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#ifndef mpn_decr_u
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#define mpn_decr_u(ptr, incr) MPN_DECR_U (ptr, 0, incr)
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#endif
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#endif
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#endif
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#if defined (__GNUC__)
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#if __GMP_GNUC_PREREQ (3,1)
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#define __GMP_qm "=Qm"
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#define __GMP_q "=Q"
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#else
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#define __GMP_qm "=qm"
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#define __GMP_q "=q"
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#endif
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#ifndef ULONG_PARITY
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#define ULONG_PARITY(p, n) \
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do { \
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char __p; \
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unsigned long __n = (n); \
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__n ^= (__n >> 16); \
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__asm__ ("xorb %h1, %b1\n\t" \
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"setpo %0" \
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: __GMP_qm (__p), __GMP_q (__n) \
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: "1" (__n)); \
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(p) = __p; \
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} while (0)
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#endif
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#endif
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/* bswap is available on i486 and up and is fast. A combination rorw $8 /
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roll $16 / rorw $8 is used in glibc for plain i386 (and in the linux
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kernel with xchgb instead of rorw), but this is not done here, because
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i386 means generic x86 and mixing word and dword operations will cause
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partial register stalls on P6 chips. */
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/* Either drop support for i386 or comment this out
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#if !defined(BSWAP_LIMB) && defined (__GNUC__) && ! HAVE_HOST_CPU_i386
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#define BSWAP_LIMB(dst, src) \
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do { \
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__asm__ ("bswap %0" : "=r" (dst) : "0" (src)); \
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} while (0)
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#endif
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*/ |