167 lines
3.7 KiB
NASM
167 lines
3.7 KiB
NASM
dnl Intel Pentium mpn_and_n,...,mpn_xnor_n -- bitwise logical operations.
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dnl Copyright 2001, 2002 Free Software Foundation, Inc.
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dnl
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dnl This file is part of the GNU MP Library.
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dnl
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dnl The GNU MP Library is free software; you can redistribute it and/or
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dnl modify it under the terms of the GNU Lesser General Public License as
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dnl published by the Free Software Foundation; either version 2.1 of the
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dnl License, or (at your option) any later version.
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dnl
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dnl The GNU MP Library is distributed in the hope that it will be useful,
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dnl but WITHOUT ANY WARRANTY; without even the implied warranty of
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dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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dnl Lesser General Public License for more details.
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dnl
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dnl You should have received a copy of the GNU Lesser General Public
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dnl License along with the GNU MP Library; see the file COPYING.LIB. If
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dnl not, write to the Free Software Foundation, Inc., 51 Franklin Street,
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dnl Fifth Floor, Boston, MA 02110-1301, USA.
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include(`../config.m4')
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C P5: 3.0 c/l and, ior, xor
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C 3.5 c/l andn, iorn, nand, nior, xnor
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define(`OPERATION_nior_n',1)
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define(M4_choose_op,
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`ifdef(`OPERATION_$1',`
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define(`M4_function', `mpn_$1')
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define(`M4_want_pre', `$4')
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define(`M4op', `$3')
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define(`M4_want_post',`$2')
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')')
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define(M4pre, `ifelse(M4_want_pre, yes,`$1')')
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define(M4post,`ifelse(M4_want_post,yes,`$1')')
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M4_choose_op( and_n, , andl, )
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M4_choose_op( andn_n, , andl, yes)
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M4_choose_op( nand_n, yes, andl, )
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M4_choose_op( ior_n, , orl, )
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M4_choose_op( iorn_n, , orl, yes)
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M4_choose_op( nior_n, yes, orl, )
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M4_choose_op( xor_n, , xorl, )
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M4_choose_op( xnor_n, yes, xorl, )
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ifdef(`M4_function',,
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`m4_error(`Unrecognised or undefined OPERATION symbol
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')')
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NAILS_SUPPORT(0-31)
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C void M4_function (mp_ptr wp, mp_srcptr xp, mp_srcptr yp, mp_size_t size);
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C
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C Nothing complicated here, just some care to avoid data cache bank clashes
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C and AGIs.
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C
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C We're one register short of being able to do a simple 4 loads, 2 ops, 2
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C stores. Instead %ebp is juggled a bit and nops are introduced to keep the
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C pairings as intended. An in-place operation would free up a register, for
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C an 0.5 c/l speedup, if that's worth bothering with.
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C
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C This code seems best for P55 too. Data alignment is a big problem for MMX
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C and the pairing restrictions on movq and integer instructions make life
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C difficult.
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defframe(PARAM_SIZE,16)
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defframe(PARAM_YP, 12)
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defframe(PARAM_XP, 8)
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defframe(PARAM_WP, 4)
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TEXT
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ALIGN(8)
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PROLOGUE(mpn_nior_n)
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deflit(`FRAME',0)
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pushl %ebx FRAME_pushl()
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pushl %esi FRAME_pushl()
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pushl %edi FRAME_pushl()
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pushl %ebp FRAME_pushl()
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movl PARAM_SIZE, %ecx
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movl PARAM_XP, %ebx
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movl PARAM_YP, %esi
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movl PARAM_WP, %edi
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shrl %ecx
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jnc L(entry)
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movl (%ebx,%ecx,8), %eax C risk of data cache bank clash here
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movl (%esi,%ecx,8), %edx
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M4pre(` notl_or_xorl_GMP_NUMB_MASK(%edx)')
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M4op %edx, %eax
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M4post(`xorl $GMP_NUMB_MASK, %eax')
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orl %ecx, %ecx
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movl %eax, (%edi,%ecx,8)
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jz L(done)
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jmp L(entry)
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L(top):
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C eax
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C ebx xp
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C ecx counter, limb pairs, decrementing
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C edx
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C esi yp
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C edi wp
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C ebp
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M4op %ebp, %edx
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nop
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M4post(`xorl $GMP_NUMB_MASK, %eax')
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M4post(`xorl $GMP_NUMB_MASK, %edx')
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movl %eax, 4(%edi,%ecx,8)
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movl %edx, (%edi,%ecx,8)
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L(entry):
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movl -4(%ebx,%ecx,8), %ebp
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nop
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movl -4(%esi,%ecx,8), %eax
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movl -8(%esi,%ecx,8), %edx
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M4pre(` xorl $GMP_NUMB_MASK, %eax')
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M4pre(` xorl $GMP_NUMB_MASK, %edx')
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M4op %ebp, %eax
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movl -8(%ebx,%ecx,8), %ebp
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decl %ecx
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jnz L(top)
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M4op %ebp, %edx
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nop
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M4post(`xorl $GMP_NUMB_MASK, %eax')
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M4post(`xorl $GMP_NUMB_MASK, %edx')
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movl %eax, 4(%edi,%ecx,8)
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movl %edx, (%edi,%ecx,8)
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L(done):
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popl %ebp
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popl %edi
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popl %esi
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popl %ebx
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ret
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EPILOGUE()
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