powerpc64 tuneup

This commit is contained in:
jasonmoxham 2011-12-04 10:37:18 +00:00
parent d090b3e7c5
commit dc5dc05709

View File

@ -1,21 +1,21 @@
/* Generated by tuneup.c, 2010-05-23, gcc 4.0 */ /* Generated by tuneup.c, 2011-12-04, gcc 4.6 */
#define MUL_KARATSUBA_THRESHOLD 16 #define MUL_KARATSUBA_THRESHOLD 16
#define MUL_TOOM3_THRESHOLD 81 #define MUL_TOOM3_THRESHOLD 101
#define MUL_TOOM4_THRESHOLD 169 #define MUL_TOOM4_THRESHOLD 151
#define MUL_TOOM8H_THRESHOLD 173 #define MUL_TOOM8H_THRESHOLD 230
#define SQR_BASECASE_THRESHOLD 4 #define SQR_BASECASE_THRESHOLD 11
#define SQR_KARATSUBA_THRESHOLD 28 #define SQR_KARATSUBA_THRESHOLD 47
#define SQR_TOOM3_THRESHOLD 97 #define SQR_TOOM3_THRESHOLD 136
#define SQR_TOOM4_THRESHOLD 266 #define SQR_TOOM4_THRESHOLD 136
#define SQR_TOOM8_THRESHOLD 266 #define SQR_TOOM8_THRESHOLD 230
#define POWM_THRESHOLD 984 #define POWM_THRESHOLD 984
#define GCD_ACCEL_THRESHOLD 387 #define HGCD_THRESHOLD 81
#define GCD_THRESHOLD 969 #define GCD_DC_THRESHOLD 890
#define GCDEXT_THRESHOLD 674 #define GCDEXT_DC_THRESHOLD 978
#define JACOBI_BASE_METHOD 1 #define JACOBI_BASE_METHOD 1
#define DIVREM_1_NORM_THRESHOLD 0 /* always */ #define DIVREM_1_NORM_THRESHOLD 0 /* always */
@ -27,50 +27,50 @@
#define DIVREM_2_THRESHOLD 0 /* always */ #define DIVREM_2_THRESHOLD 0 /* always */
#define DIVEXACT_1_THRESHOLD 0 /* always */ #define DIVEXACT_1_THRESHOLD 0 /* always */
#define MODEXACT_1_ODD_THRESHOLD 0 /* always */ #define MODEXACT_1_ODD_THRESHOLD 0 /* always */
#define MOD_1_1_THRESHOLD 8 #define MOD_1_1_THRESHOLD 7
#define MOD_1_2_THRESHOLD 8 #define MOD_1_2_THRESHOLD 7
#define MOD_1_3_THRESHOLD 25 #define MOD_1_3_THRESHOLD 7
#define DIVREM_HENSEL_QR_1_THRESHOLD 31 #define DIVREM_HENSEL_QR_1_THRESHOLD 2
#define RSH_DIVREM_HENSEL_QR_1_THRESHOLD 58 #define RSH_DIVREM_HENSEL_QR_1_THRESHOLD 3
#define DIVREM_EUCLID_HENSEL_THRESHOLD 8 #define DIVREM_EUCLID_HENSEL_THRESHOLD 8
#define ROOTREM_THRESHOLD 6 #define ROOTREM_THRESHOLD 6
#define GET_STR_DC_THRESHOLD 12 #define GET_STR_DC_THRESHOLD 11
#define GET_STR_PRECOMPUTE_THRESHOLD 23 #define GET_STR_PRECOMPUTE_THRESHOLD 23
#define SET_STR_DC_THRESHOLD 5510 #define SET_STR_DC_THRESHOLD 6915
#define SET_STR_PRECOMPUTE_THRESHOLD 93171 #define SET_STR_PRECOMPUTE_THRESHOLD 19321
#define MUL_FFT_TABLE { 304, 672, 1600, 2304, 7168, 20480, 81920, 458752, 1310720, 5242880, 0 } #define MUL_FFT_TABLE { 304, 672, 1728, 2304, 7168, 20480, 81920, 196608, 1310720, 5242880, 12582912, 0 }
#define MUL_FFT_MODF_THRESHOLD 272 #define MUL_FFT_MODF_THRESHOLD 304
#define MUL_FFT_FULL_THRESHOLD 1728 #define MUL_FFT_FULL_THRESHOLD 1856
#define SQR_FFT_TABLE { 272, 672, 1600, 2304, 7168, 20480, 81920, 458752, 1310720, 5242880, 0 } #define SQR_FFT_TABLE { 304, 672, 1600, 2304, 7168, 20480, 81920, 196608, 1310720, 5242880, 0 }
#define SQR_FFT_MODF_THRESHOLD 216 #define SQR_FFT_MODF_THRESHOLD 232
#define SQR_FFT_FULL_THRESHOLD 1728 #define SQR_FFT_FULL_THRESHOLD 1728
#define MULLOW_BASECASE_THRESHOLD 0 /* always */ #define MULLOW_BASECASE_THRESHOLD 0 /* always */
#define MULLOW_DC_THRESHOLD 47 #define MULLOW_DC_THRESHOLD 58
#define MULLOW_MUL_THRESHOLD 3114 #define MULLOW_MUL_THRESHOLD 2743
#define MULHIGH_BASECASE_THRESHOLD 4 #define MULHIGH_BASECASE_THRESHOLD 0 /* always */
#define MULHIGH_DC_THRESHOLD 47 #define MULHIGH_DC_THRESHOLD 59
#define MULHIGH_MUL_THRESHOLD 3114 #define MULHIGH_MUL_THRESHOLD 2743
#define MULMOD_2EXPM1_THRESHOLD 14 #define MULMOD_2EXPM1_THRESHOLD 14
#define FAC_UI_THRESHOLD 31169 #define FAC_UI_THRESHOLD 28222
#define DC_DIV_QR_THRESHOLD 21 #define DC_DIV_QR_THRESHOLD 17
#define DC_DIVAPPR_Q_N_THRESHOLD 52 #define DC_DIVAPPR_Q_N_THRESHOLD 48
#define INV_DIV_QR_THRESHOLD 3031 #define INV_DIV_QR_THRESHOLD 2350
#define INV_DIVAPPR_Q_N_THRESHOLD 52 #define INV_DIVAPPR_Q_N_THRESHOLD 48
#define DC_DIV_Q_THRESHOLD 83 #define DC_DIV_Q_THRESHOLD 95
#define INV_DIV_Q_THRESHOLD 2492 #define INV_DIV_Q_THRESHOLD 2350
#define DC_DIVAPPR_Q_THRESHOLD 69 #define DC_DIVAPPR_Q_THRESHOLD 65
#define INV_DIVAPPR_Q_THRESHOLD 5113 #define INV_DIVAPPR_Q_THRESHOLD 5363
#define DC_BDIV_QR_THRESHOLD 48 #define DC_BDIV_QR_THRESHOLD 76
#define DC_BDIV_Q_THRESHOLD 21 #define DC_BDIV_Q_THRESHOLD 22
/* Tuneup completed successfully, took 865 seconds */ /* Tuneup completed successfully, took 391 seconds */
#define MUL_FFT_TABLE2 {{1, 4}, {242, 5}, {485, 6}, {519, 5}, {555, 6}, {1238, 7}, {1294, 6}, {1352, 7}, {2191, 8}, {2340, 7}, {2445, 8}, {5478, 9}, {5721, 8}, {6518, 9}, {6661, 8}, {6957, 9}, {7756, 8}, {8100, 9}, {10980, 10}, {11467, 9}, {13939, 10}, {15535, 9}, {16944, 10}, {19722, 9}, {20154, 10}, {23970, 9}, {24495, 10}, {27898, 11}, {31091, 10}, {40326, 11}, {47962, 10}, {52305, 11}, {53451, 12}, {63570, 10}, {69326, 11}, {80681, 10}, {82448, 11}, {98051, 12}, {127165, 11}, {164920, 12}, {196129, 13}, {254354, 12}, {259924, 10}, {392279, 11}, {719463, 9}, {735218, 10}, {751318, 11}, {784582, 12}, {MP_SIZE_T_MAX,0}} #define MUL_FFT_TABLE2 {{1, 4}, {242, 5}, {485, 6}, {519, 5}, {555, 6}, {1238, 7}, {1294, 6}, {1352, 7}, {2191, 8}, {2340, 7}, {2445, 8}, {5478, 9}, {5721, 8}, {6518, 9}, {6661, 8}, {6957, 9}, {7756, 8}, {8100, 9}, {10980, 10}, {11467, 9}, {13939, 10}, {15535, 9}, {16944, 10}, {19722, 9}, {20154, 10}, {23970, 9}, {24495, 10}, {27898, 11}, {31091, 10}, {40326, 11}, {47962, 10}, {52305, 11}, {53451, 12}, {63570, 10}, {69326, 11}, {80681, 10}, {82448, 11}, {98051, 12}, {127165, 11}, {164920, 12}, {196129, 13}, {254354, 12}, {259924, 10}, {392279, 11}, {719463, 9}, {735218, 10}, {751318, 11}, {784582, 12}, {MP_SIZE_T_MAX,0}}