From 845660e59e889a6ba67a57905dc4df77a15b0295 Mon Sep 17 00:00:00 2001 From: "(no author)" <(no author)> Date: Wed, 24 Mar 2010 18:09:08 +0000 Subject: [PATCH] mpn/x86/core2/gmp-mparam.h from menas --- mpn/x86/core2/gmp-mparam.h | 89 +++++++++++++++++++++----------------- 1 file changed, 49 insertions(+), 40 deletions(-) diff --git a/mpn/x86/core2/gmp-mparam.h b/mpn/x86/core2/gmp-mparam.h index 933b587d..2e41e01c 100644 --- a/mpn/x86/core2/gmp-mparam.h +++ b/mpn/x86/core2/gmp-mparam.h @@ -1,33 +1,20 @@ -/* Generated by tuneup.c, 2009-10-08, gcc 4.2 */ +/* Generated by tuneup.c, 2010-03-24, gcc 4.4 */ #define MUL_KARATSUBA_THRESHOLD 22 -#define MUL_TOOM3_THRESHOLD 89 -#define MUL_TOOM4_THRESHOLD 202 -#define MUL_TOOM7_THRESHOLD 286 +#define MUL_TOOM3_THRESHOLD 129 +#define MUL_TOOM4_THRESHOLD 181 +#define MUL_TOOM8H_THRESHOLD 226 #define SQR_BASECASE_THRESHOLD 0 /* always (native) */ -#define SQR_KARATSUBA_THRESHOLD 42 -#define SQR_TOOM3_THRESHOLD 187 -#define SQR_TOOM4_THRESHOLD 232 -#define SQR_TOOM7_THRESHOLD 680 +#define SQR_KARATSUBA_THRESHOLD 40 +#define SQR_TOOM3_THRESHOLD 126 +#define SQR_TOOM4_THRESHOLD 214 +#define SQR_TOOM8_THRESHOLD 222 -#define MULLOW_BASECASE_THRESHOLD 6 -#define MULLOW_DC_THRESHOLD 88 -#define MULLOW_MUL_THRESHOLD 6713 +#define POWM_THRESHOLD 984 -#define MULHIGH_BASECASE_THRESHOLD 8 -#define MULHIGH_DC_THRESHOLD 87 -#define MULHIGH_MUL_THRESHOLD 6713 - -#define MULMOD_2EXPM1_THRESHOLD 18 - -#define DIV_SB_PREINV_THRESHOLD 4 -#define DIV_DC_THRESHOLD 69 -#define POWM_THRESHOLD 185 -#define FAC_UI_THRESHOLD 2169 - -#define GCD_ACCEL_THRESHOLD 1 -#define GCDEXT_THRESHOLD 82 +#define GCD_ACCEL_THRESHOLD 64 +#define GCDEXT_THRESHOLD 104 #define JACOBI_BASE_METHOD 1 #define USE_PREINV_DIVREM_1 1 /* native */ @@ -35,25 +22,47 @@ #define DIVREM_2_THRESHOLD 0 /* always */ #define DIVEXACT_1_THRESHOLD 0 /* always (native) */ #define MODEXACT_1_ODD_THRESHOLD 0 /* always */ -#define MOD_1_1_THRESHOLD 7 -#define MOD_1_2_THRESHOLD 8 -#define MOD_1_3_THRESHOLD 996 -#define DIVREM_HENSEL_QR_1_THRESHOLD 9 -#define RSH_DIVREM_HENSEL_QR_1_THRESHOLD 3 -#define DIVREM_EUCLID_HENSEL_THRESHOLD 59 +#define MOD_1_1_THRESHOLD 6 +#define MOD_1_2_THRESHOLD 6 +#define MOD_1_3_THRESHOLD 19 +#define DIVREM_HENSEL_QR_1_THRESHOLD 996 +#define RSH_DIVREM_HENSEL_QR_1_THRESHOLD 996 +#define DIVREM_EUCLID_HENSEL_THRESHOLD 399 #define ROOTREM_THRESHOLD 6 -#define GET_STR_DC_THRESHOLD 25 -#define GET_STR_PRECOMPUTE_THRESHOLD 36 -#define SET_STR_THRESHOLD 5835 +#define GET_STR_DC_THRESHOLD 16 +#define GET_STR_PRECOMPUTE_THRESHOLD 26 +#define SET_STR_DC_THRESHOLD 14963 +#define SET_STR_PRECOMPUTE_THRESHOLD 16195 -#define MUL_FFT_TABLE { 400, 1056, 1408, 3584, 10240, 24576, 163840, 655360, 0 } -#define MUL_FFT_MODF_THRESHOLD 312 -#define MUL_FFT_THRESHOLD 7168 +#define MUL_FFT_TABLE { 400, 992, 1408, 3584, 10240, 40960, 98304, 655360, 2621440, 0 } +#define MUL_FFT_MODF_THRESHOLD 360 +#define MUL_FFT_FULL_THRESHOLD 1664 -#define SQR_FFT_TABLE { 368, 928, 1408, 3584, 10240, 40960, 98304, 655360, 0 } -#define SQR_FFT_MODF_THRESHOLD 360 -#define SQR_FFT_THRESHOLD 3840 +#define SQR_FFT_TABLE { 336, 864, 1408, 3584, 10240, 40960, 163840, 655360, 2621440, 10485760, 0 } +#define SQR_FFT_MODF_THRESHOLD 352 +#define SQR_FFT_FULL_THRESHOLD 1664 -/* Tuneup completed successfully, took 62 seconds */ +#define MULLOW_BASECASE_THRESHOLD 7 +#define MULLOW_DC_THRESHOLD 93 +#define MULLOW_MUL_THRESHOLD 2852 + +#define MULHIGH_BASECASE_THRESHOLD 8 +#define MULHIGH_DC_THRESHOLD 87 +#define MULHIGH_MUL_THRESHOLD 2852 + +#define MULMOD_2EXPM1_THRESHOLD 18 + +#define FAC_UI_THRESHOLD 3300 +#define DC_DIV_QR_THRESHOLD 60 +#define DC_DIVAPPR_Q_N_THRESHOLD 195 +#define INV_DIV_QR_THRESHOLD 2857 +#define INV_DIVAPPR_Q_N_THRESHOLD 195 +#define DC_DIV_Q_THRESHOLD 229 +#define INV_DIV_Q_THRESHOLD 2350 +#define DC_DIVAPPR_Q_THRESHOLD 195 +#define INV_DIVAPPR_Q_THRESHOLD 5363 +#define DC_BDIV_QR_THRESHOLD 110 +#define DC_BDIV_Q_THRESHOLD 42 +/* Tuneup completed successfully, took 404 seconds */