Conversion of redc_basecase of Jason Moxham to yasm format.
This commit is contained in:
wbhart
parent
5ceb500330
commit
661b1673c9
420
mpn/x86_64/amd64/redc_basecase.as
Normal file
420
mpn/x86_64/amd64/redc_basecase.as
Normal file
@ -0,0 +1,420 @@
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; AMD64 mpn_redc_basecase
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; Copyright 2009 Jason Moxham
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; This file is part of the MPIR Library.
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; The MPIR Library is free software; you can redistribute it and/or modify
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; it under the terms of the GNU Lesser General Public License as published
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; by the Free Software Foundation; either version 2.1 of the License, or (at
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; your option) any later version.
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; The MPIR Library is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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; License for more details.
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; You should have received a copy of the GNU Lesser General Public License
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; along with the MPIR Library; see the file COPYING.LIB. If not, write
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; to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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; Boston, MA 02110-1301, USA.
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; Version 1.0.4
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; (rdi,rcx)=(rsi,rcx)+(rdx,rcx) with the carry flag set for the carry
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; this is the usual mpn_add_n with the final dec rax;adc rax,rax;ret removed
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; and a jump where we have two rets
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%include '../yasm_mac.inc'
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BITS 64
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%macro mpn_add 0
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mov rax, rcx
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and rax, 3
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shr rcx, 2
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cmp rcx, 0
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; carry flag is clear here
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jnz %%1
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mov r11, [rsi]
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add r11, [rdx]
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mov [rdi], r11
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dec rax
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jz %%2
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mov r11, [rsi+8]
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adc r11, [rdx+8]
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mov [rdi+8], r11
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dec rax
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jz %%2
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mov r11, [rsi+16]
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adc r11, [rdx+16]
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mov [rdi+16], r11
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jmp %%2
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align 16
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%%1:
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mov r11, [rsi]
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mov r8, [rsi+8]
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lea rsi, [rsi+32]
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adc r11, [rdx]
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adc r8, [rdx+8]
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lea rdx, [rdx+32]
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mov [rdi], r11
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mov [rdi+8], r8
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lea rdi, [rdi+32]
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mov r9, [rsi-16]
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mov r10, [rsi-8]
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adc r9, [rdx-16]
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adc r10, [rdx-8]
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mov [rdi-16], r9
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dec rcx
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mov [rdi-8], r10
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jnz %%1
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inc rax
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dec rax
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jz %%2
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mov r11, [rsi]
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adc r11, [rdx]
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mov [rdi], r11
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dec rax
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jz %%2
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mov r11, [rsi+8]
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adc r11, [rdx+8]
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mov [rdi+8], r11
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dec rax
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jz %%2
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mov r11, [rsi+16]
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adc r11, [rdx+16]
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mov [rdi+16], r11
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%%2:
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%endmacro
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; (rbx, rbp) = (rsi, rbp) - (rdx, rbp)
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%macro mpn_sub 0
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mov rax, rbp
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and rax, 3
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shr rbp, 2
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cmp rbp, 0
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; carry flag is clear here
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jnz %%1
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mov r11, [rsi]
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sub r11, [rdx]
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mov [rbx], r11
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dec rax
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jz %%2
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mov r11, [rsi+8]
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sbb r11, [rdx+8]
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mov [rbx+8], r11
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dec rax
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jz %%2
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mov r11, [rsi+16]
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sbb r11, [rdx+16]
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mov [rbx+16], r11
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jmp %%2
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align 16
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%%1:
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mov r11, [rsi]
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mov r8, [rsi+8]
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lea rsi, [rsi+32]
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sbb r11, [rdx]
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sbb r8, [rdx+8]
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lea rdx, [rdx+32]
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mov [rbx], r11
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mov [rbx+8], r8
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lea rbx, [rbx+32]
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mov r9, [rsi-16]
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mov r10, [rsi-8]
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sbb r9, [rdx-16]
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sbb r10, [rdx-8]
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mov [rbx-16], r9
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dec rbp
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mov [rbx-8], r10
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jnz %%1
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inc rax
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dec rax
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jz %%2
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mov r11, [rsi]
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sbb r11, [rdx]
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mov [rbx], r11
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dec rax
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jz %%2
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mov r11, [rsi+8]
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sbb r11, [rdx+8]
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mov [rbx+8], r11
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dec rax
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jz %%2
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mov r11, [rsi+16]
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sbb r11, [rdx+16]
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mov [rbx+16], r11
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%%2:
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%endmacro
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; changes from standard addmul
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; change r8 to r12 and rcx to r13 and rdi to r8
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; reemove ret and write last limb but to beginning
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%macro addmulloop 1
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align 16
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%%1:
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mov r10, 0
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mul r13
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add [r8+r11*8], r12
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adc r9, rax
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db 0x26
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [r8+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov rax, [rsi+r11*8+24]
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mov r12, 0
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mov r9, 0
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mul r13
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add [r8+r11*8+16], r10
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db 0x26
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adc rbx, rax
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db 0x26
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adc r12, rdx
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mov rax, [rsi+r11*8+32]
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mul r13
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add [r8+r11*8+24], rbx
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db 0x26
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adc r12, rax
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db 0x26
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adc r9, rdx
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add r11, 4
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mov rax, [rsi+r11*8+8]
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jnc %%1
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%endmacro
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%macro addmulpropro0 0
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imul r13, rcx
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lea r8, [r8-8]
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%endmacro
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%macro addmulpro0 0
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mov r11, r14
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lea r8, [r8+8]
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mov rax, [rsi+r14*8]
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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%endmacro
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%macro addmulnext0 0
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mov r10d, 0
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mul r13
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add [r8+r11*8], r12
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adc r9, rax
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [r8+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov rax, [rsi+r11*8+24]
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mov r12d, 0
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mov r9d, 0
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mul r13
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add [r8+r11*8+16], r10
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adc rbx, rax
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adc r12, rdx
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mov rax, [rsi+r11*8+32]
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mul r13
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add [r8+r11*8+24], rbx
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mov r13, [r8+r14*8+8]
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adc r12, rax
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adc r9, rdx
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imul r13, rcx
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add [r8+r11*8+32], r12
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adc r9, 0
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dec r15
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mov [r8+r14*8], r9
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%endmacro
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%macro addmulpropro1 0
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%endmacro
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%macro addmulpro1 0
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imul r13, rcx
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mov rax, [rsi+r14*8]
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mov r11, r14
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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%endmacro
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%macro addmulnext1 0
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mov r10d, 0
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mul r13
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add [r8+r11*8], r12
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adc r9, rax
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [r8+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov rax, [rsi+r11*8+24]
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mov r12d, 0
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mul r13
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add [r8+r11*8+16], r10
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adc rbx, rax
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adc r12, rdx
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add [r8+r11*8+24], rbx
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mov r13, [r8+r14*8+8]
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adc r12, 0
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dec r15
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mov [r8+r14*8], r12
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lea r8, [r8+8]
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%endmacro
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%macro addmulpropro2 0
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%endmacro
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%macro addmulpro2 0
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imul r13, rcx
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mov rax, [rsi+r14*8]
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mov r11, r14
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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%endmacro
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%macro addmulnext2 0
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mul r13
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add [r8+r11*8], r12
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adc r9, rax
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mov r10d, 0
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adc r10, rdx
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mov rax, [rsi+r11*8+16]
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mul r13
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add [r8+r11*8+8], r9
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adc r10, rax
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mov ebx, 0
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adc rbx, rdx
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mov r13, [r8+r14*8+8]
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add [r8+r11*8+16], r10
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adc rbx, 0
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mov [r8+r14*8], rbx
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dec r15
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lea r8, [r8+8]
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%endmacro
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%macro addmulpropro3 0
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%endmacro
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%macro addmulpro3 0
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imul r13, rcx
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mov rax, [rsi+r14*8]
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mov r11, r14
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mul r13
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mov r12, rax
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mov rax, [rsi+r14*8+8]
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mov r9, rdx
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cmp r14, 0
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%endmacro
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%macro addmulnext3 0
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mul r13
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add [r8+r11*8], r12
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adc r9, rax
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mov r10d, 0
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adc r10, rdx
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add [r8+r11*8+8], r9
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adc r10, 0
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mov r13, [r8+r14*8+8]
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mov [r8+r14*8], r10
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lea r8, [r8+8]
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dec r15
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%endmacro
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; change r8 to r12
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; write top limb ax straight to mem dont return (NOTE we WRITE NOT ADD)
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%macro mpn_addmul_1_int 1
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addmulpropro%1
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align 16
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%%1:
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addmulpro%1
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jge %%2
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addmulloop %1
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%%2:
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addmulnext%1
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jnz %%1
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jmp end
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%endmacro
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GLOBAL_FUNC mpn_redc_basecase
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cmp rdx, 1
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je one
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push r13
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push r14
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push rbx
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push r12
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push r15
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push rbp
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mov r14, 5
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sub r14, rdx
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; store copys
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push rsi
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push r8
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lea r8, [r8+rdx*8-40]
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lea rsi, [rsi+rdx*8-40]
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mov rbp, rdx
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mov r15, rdx
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mov rax, r14
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and rax, 3
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mov r13, [r8+r14*8]
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je case0
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jp case3
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cmp rax, 1
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je case1
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case2:
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mpn_addmul_1_int 2
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align 16
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case0:
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mpn_addmul_1_int 0
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align 16
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case1:
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mpn_addmul_1_int 1
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align 16
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case3:
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mpn_addmul_1_int 3
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align 16
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end:
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mov rcx, rbp
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pop rdx
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lea rsi, [rdx+rbp*8]
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mov rbx, rdi
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mpn_add
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; mpnadd(rdi,rsi,rdx,rcx)
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pop rdx
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jnc skip
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mov rsi, rbx
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mpn_sub
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; mpn_sub_n(rbx,rsi,rdx,rbp) we can certainly improve this sub
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skip:
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pop rbp
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pop r15
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pop r12
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pop rbx
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pop r14
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pop r13
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ret
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align 16
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one:
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mov r9, [r8]
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mov r11, [rsi]
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imul rcx, r9
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mov rax, rcx
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mul r11
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add rax, r9
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; rax is zero here
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adc rdx, [r8+8]
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cmovnc r11, rax
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sub rdx, r11
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mov [rdi], rdx
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ret
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@ -1,424 +0,0 @@
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dnl AMD64 mpn_redc_basecase
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dnl Copyright 2009 Jason Moxham
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dnl This file is part of the MPIR Library.
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dnl The MPIR Library is free software; you can redistribute it and/or modify
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dnl it under the terms of the GNU Lesser General Public License as published
|
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dnl by the Free Software Foundation; either version 2.1 of the License, or (at
|
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dnl your option) any later version.
|
||||
|
||||
dnl The MPIR Library is distributed in the hope that it will be useful, but
|
||||
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
|
||||
dnl License for more details.
|
||||
|
||||
dnl You should have received a copy of the GNU Lesser General Public License
|
||||
dnl along with the MPIR Library; see the file COPYING.LIB. If not, write
|
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dnl to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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||||
dnl Boston, MA 02110-1301, USA.
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||||
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include(`../config.m4')
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C Version 1.0.4
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C (rdi,rcx)=(rsi,rcx)+(rdx,rcx) with the carry flag set for the carry
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C this is the usual mpn_add_n with the final dec rax;adc rax,rax;ret removed
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C and a jump where we have two rets
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define(`MPN_ADD',`
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mov %rcx,%rax
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and `$'3,%rax
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shr `$'2,%rcx
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cmp `$'0,%rcx
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C carry flag is clear here
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jnz addloop
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mov (%rsi),%r11
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add (%rdx),%r11
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mov %r11,(%rdi)
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dec %rax
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jz addend
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mov 8(%rsi),%r11
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adc 8(%rdx),%r11
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mov %r11,8(%rdi)
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dec %rax
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jz addend
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mov 16(%rsi),%r11
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adc 16(%rdx),%r11
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mov %r11,16(%rdi)
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jmp addend
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ALIGN(16)
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addloop:
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mov (%rsi),%r11
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mov 8(%rsi),%r8
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lea 32(%rsi),%rsi
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adc (%rdx),%r11
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adc 8(%rdx),%r8
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lea 32(%rdx),%rdx
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mov %r11,(%rdi)
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mov %r8,8(%rdi)
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lea 32(%rdi),%rdi
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mov -16(%rsi),%r9
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mov -8(%rsi),%r10
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adc -16(%rdx),%r9
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adc -8(%rdx),%r10
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mov %r9,-16(%rdi)
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dec %rcx
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mov %r10,-8(%rdi)
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jnz addloop
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inc %rax
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dec %rax
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jz addend
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mov (%rsi),%r11
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adc (%rdx),%r11
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mov %r11,(%rdi)
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dec %rax
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jz addend
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mov 8(%rsi),%r11
|
||||
adc 8(%rdx),%r11
|
||||
mov %r11,8(%rdi)
|
||||
dec %rax
|
||||
jz addend
|
||||
mov 16(%rsi),%r11
|
||||
adc 16(%rdx),%r11
|
||||
mov %r11,16(%rdi)
|
||||
addend:
|
||||
')
|
||||
|
||||
C (rbx,rbp)=(rsi,rbp)-(rdx,rbp)
|
||||
define(`MPN_SUB',`
|
||||
mov %rbp,%rax
|
||||
and `$'3,%rax
|
||||
shr `$'2,%rbp
|
||||
cmp `$'0,%rbp
|
||||
C carry flag is clear here
|
||||
jnz subloop
|
||||
mov (%rsi),%r11
|
||||
sub (%rdx),%r11
|
||||
mov %r11,(%rbx)
|
||||
dec %rax
|
||||
jz subend
|
||||
mov 8(%rsi),%r11
|
||||
sbb 8(%rdx),%r11
|
||||
mov %r11,8(%rbx)
|
||||
dec %rax
|
||||
jz subend
|
||||
mov 16(%rsi),%r11
|
||||
sbb 16(%rdx),%r11
|
||||
mov %r11,16(%rbx)
|
||||
jmp subend
|
||||
ALIGN(16)
|
||||
subloop:
|
||||
mov (%rsi),%r11
|
||||
mov 8(%rsi),%r8
|
||||
lea 32(%rsi),%rsi
|
||||
sbb (%rdx),%r11
|
||||
sbb 8(%rdx),%r8
|
||||
lea 32(%rdx),%rdx
|
||||
mov %r11,(%rbx)
|
||||
mov %r8,8(%rbx)
|
||||
lea 32(%rbx),%rbx
|
||||
mov -16(%rsi),%r9
|
||||
mov -8(%rsi),%r10
|
||||
sbb -16(%rdx),%r9
|
||||
sbb -8(%rdx),%r10
|
||||
mov %r9,-16(%rbx)
|
||||
dec %rbp
|
||||
mov %r10,-8(%rbx)
|
||||
jnz subloop
|
||||
inc %rax
|
||||
dec %rax
|
||||
jz subend
|
||||
mov (%rsi),%r11
|
||||
sbb (%rdx),%r11
|
||||
mov %r11,(%rbx)
|
||||
dec %rax
|
||||
jz subend
|
||||
mov 8(%rsi),%r11
|
||||
sbb 8(%rdx),%r11
|
||||
mov %r11,8(%rbx)
|
||||
dec %rax
|
||||
jz subend
|
||||
mov 16(%rsi),%r11
|
||||
sbb 16(%rdx),%r11
|
||||
mov %r11,16(%rbx)
|
||||
subend:
|
||||
')
|
||||
|
||||
C changes from standard addmul
|
||||
C change r8 to r12 and rcx to r13 and rdi to r8
|
||||
C reemove ret and write last limb but to beginning
|
||||
define(`ADDMULLOOP',`
|
||||
ALIGN(16)
|
||||
addmulloop$1:
|
||||
mov `$'0,%r10
|
||||
mul %r13
|
||||
add %r12,(%r8,%r11,8)
|
||||
adc %rax,%r9
|
||||
.byte 0x26
|
||||
adc %rdx,%r10
|
||||
mov 16(%rsi,%r11,8),%rax
|
||||
mul %r13
|
||||
add %r9,8(%r8,%r11,8)
|
||||
adc %rax,%r10
|
||||
mov `$'0,%ebx
|
||||
adc %rdx,%rbx
|
||||
mov 24(%rsi,%r11,8),%rax
|
||||
mov `$'0,%r12
|
||||
mov `$'0,%r9
|
||||
mul %r13
|
||||
add %r10,16(%r8,%r11,8)
|
||||
.byte 0x26
|
||||
adc %rax,%rbx
|
||||
.byte 0x26
|
||||
adc %rdx,%r12
|
||||
mov 32(%rsi,%r11,8),%rax
|
||||
mul %r13
|
||||
add %rbx,24(%r8,%r11,8)
|
||||
.byte 0x26
|
||||
adc %rax,%r12
|
||||
.byte 0x26
|
||||
adc %rdx,%r9
|
||||
add `$'4,%r11
|
||||
mov 8(%rsi,%r11,8),%rax
|
||||
jnc addmulloop$1
|
||||
')
|
||||
|
||||
define(`ADDMULPROPRO0',`
|
||||
imul %rcx,%r13
|
||||
lea -8(%r8),%r8
|
||||
')
|
||||
|
||||
define(`ADDMULPRO0',`
|
||||
mov %r14,%r11
|
||||
lea 8(%r8),%r8
|
||||
mov (%rsi,%r14,8),%rax
|
||||
mul %r13
|
||||
mov %rax,%r12
|
||||
mov 8(%rsi,%r14,8),%rax
|
||||
mov %rdx,%r9
|
||||
cmp `$'0,%r14
|
||||
')
|
||||
|
||||
define(`ADDMULNEXT0',`
|
||||
mov `$'0,%r10d
|
||||
mul %r13
|
||||
add %r12,(%r8,%r11,8)
|
||||
adc %rax,%r9
|
||||
adc %rdx,%r10
|
||||
mov 16(%rsi,%r11,8),%rax
|
||||
mul %r13
|
||||
add %r9,8(%r8,%r11,8)
|
||||
adc %rax,%r10
|
||||
mov `$'0,%ebx
|
||||
adc %rdx,%rbx
|
||||
mov 24(%rsi,%r11,8),%rax
|
||||
mov `$'0,%r12d
|
||||
mov `$'0,%r9d
|
||||
mul %r13
|
||||
add %r10,16(%r8,%r11,8)
|
||||
adc %rax,%rbx
|
||||
adc %rdx,%r12
|
||||
mov 32(%rsi,%r11,8),%rax
|
||||
mul %r13
|
||||
add %rbx,24(%r8,%r11,8)
|
||||
mov 8(%r8,%r14,8),%r13
|
||||
adc %rax,%r12
|
||||
adc %rdx,%r9
|
||||
imul %rcx,%r13
|
||||
add %r12,32(%r8,%r11,8)
|
||||
adc `$'0,%r9
|
||||
dec %r15
|
||||
mov %r9,(%r8,%r14,8)
|
||||
')
|
||||
|
||||
define(`ADDMULPROPRO1',`
|
||||
')
|
||||
|
||||
define(`ADDMULPRO1',`
|
||||
imul %rcx,%r13
|
||||
mov (%rsi,%r14,8),%rax
|
||||
mov %r14,%r11
|
||||
mul %r13
|
||||
mov %rax,%r12
|
||||
mov 8(%rsi,%r14,8),%rax
|
||||
mov %rdx,%r9
|
||||
cmp `$'0,%r14
|
||||
')
|
||||
|
||||
define(`ADDMULNEXT1',`
|
||||
mov `$'0,%r10d
|
||||
mul %r13
|
||||
add %r12,(%r8,%r11,8)
|
||||
adc %rax,%r9
|
||||
adc %rdx,%r10
|
||||
mov 16(%rsi,%r11,8),%rax
|
||||
mul %r13
|
||||
add %r9,8(%r8,%r11,8)
|
||||
adc %rax,%r10
|
||||
mov `$'0,%ebx
|
||||
adc %rdx,%rbx
|
||||
mov 24(%rsi,%r11,8),%rax
|
||||
mov `$'0,%r12d
|
||||
mul %r13
|
||||
add %r10,16(%r8,%r11,8)
|
||||
adc %rax,%rbx
|
||||
adc %rdx,%r12
|
||||
add %rbx,24(%r8,%r11,8)
|
||||
mov 8(%r8,%r14,8),%r13
|
||||
adc `$'0,%r12
|
||||
dec %r15
|
||||
mov %r12,(%r8,%r14,8)
|
||||
lea 8(%r8),%r8
|
||||
')
|
||||
|
||||
define(`ADDMULPROPRO2',`
|
||||
')
|
||||
|
||||
define(`ADDMULPRO2',`
|
||||
imul %rcx,%r13
|
||||
mov (%rsi,%r14,8),%rax
|
||||
mov %r14,%r11
|
||||
mul %r13
|
||||
mov %rax,%r12
|
||||
mov 8(%rsi,%r14,8),%rax
|
||||
mov %rdx,%r9
|
||||
cmp `$'0,%r14
|
||||
')
|
||||
|
||||
define(`ADDMULNEXT2',`
|
||||
mul %r13
|
||||
add %r12,(%r8,%r11,8)
|
||||
adc %rax,%r9
|
||||
mov `$'0,%r10d
|
||||
adc %rdx,%r10
|
||||
mov 16(%rsi,%r11,8),%rax
|
||||
mul %r13
|
||||
add %r9,8(%r8,%r11,8)
|
||||
adc %rax,%r10
|
||||
mov `$'0,%ebx
|
||||
adc %rdx,%rbx
|
||||
mov 8(%r8,%r14,8),%r13
|
||||
add %r10,16(%r8,%r11,8)
|
||||
adc `$'0,%rbx
|
||||
mov %rbx,(%r8,%r14,8)
|
||||
dec %r15
|
||||
lea 8(%r8),%r8
|
||||
')
|
||||
|
||||
define(`ADDMULPROPRO3',`
|
||||
')
|
||||
|
||||
define(`ADDMULPRO3',`
|
||||
imul %rcx,%r13
|
||||
mov (%rsi,%r14,8),%rax
|
||||
mov %r14,%r11
|
||||
mul %r13
|
||||
mov %rax,%r12
|
||||
mov 8(%rsi,%r14,8),%rax
|
||||
mov %rdx,%r9
|
||||
cmp `$'0,%r14
|
||||
')
|
||||
|
||||
define(`ADDMULNEXT3',`
|
||||
mul %r13
|
||||
add %r12,(%r8,%r11,8)
|
||||
adc %rax,%r9
|
||||
mov `$'0,%r10d
|
||||
adc %rdx,%r10
|
||||
add %r9,8(%r8,%r11,8)
|
||||
adc `$'0,%r10
|
||||
mov 8(%r8,%r14,8),%r13
|
||||
mov %r10,(%r8,%r14,8)
|
||||
lea 8(%r8),%r8
|
||||
dec %r15
|
||||
')
|
||||
|
||||
C change r8 to r12
|
||||
C write top limb ax straight to mem dont return (NOTE we WRITE NOT ADD)
|
||||
define(`MPN_ADDMUL_1_INT',`
|
||||
ADDMULPROPRO$1
|
||||
ALIGN(16)
|
||||
loopaddmul$1:
|
||||
ADDMULPRO$1
|
||||
jge addmulskiploop$1
|
||||
ADDMULLOOP($1)
|
||||
addmulskiploop$1:
|
||||
ADDMULNEXT$1
|
||||
jnz loopaddmul$1
|
||||
jmp end
|
||||
')
|
||||
|
||||
ASM_START()
|
||||
PROLOGUE(mpn_redc_basecase)
|
||||
cmp $1,%rdx
|
||||
je one
|
||||
push %r13
|
||||
push %r14
|
||||
push %rbx
|
||||
push %r12
|
||||
push %r15
|
||||
push %rbp
|
||||
mov $5,%r14
|
||||
sub %rdx,%r14
|
||||
C store copys
|
||||
push %rsi
|
||||
push %r8
|
||||
lea -40(%r8,%rdx,8),%r8
|
||||
lea -40(%rsi,%rdx,8),%rsi
|
||||
mov %rdx,%rbp
|
||||
mov %rdx,%r15
|
||||
mov %r14,%rax
|
||||
and $3,%rax
|
||||
mov (%r8,%r14,8),%r13
|
||||
je case0
|
||||
jp case3
|
||||
cmp $1,%rax
|
||||
je case1
|
||||
case2:
|
||||
MPN_ADDMUL_1_INT(2)
|
||||
ALIGN(16)
|
||||
case0:
|
||||
MPN_ADDMUL_1_INT(0)
|
||||
ALIGN(16)
|
||||
case1:
|
||||
MPN_ADDMUL_1_INT(1)
|
||||
ALIGN(16)
|
||||
case3:
|
||||
MPN_ADDMUL_1_INT(3)
|
||||
ALIGN(16)
|
||||
end:
|
||||
mov %rbp,%rcx
|
||||
pop %rdx
|
||||
lea (%rdx,%rbp,8),%rsi
|
||||
mov %rdi,%rbx
|
||||
MPN_ADD()
|
||||
C mpnadd(rdi,rsi,rdx,rcx)
|
||||
pop %rdx
|
||||
jnc skip
|
||||
mov %rbx,%rsi
|
||||
MPN_SUB()
|
||||
C mpn_sub_n(rbx,rsi,rdx,rbp) we can certainly improve this sub
|
||||
skip:
|
||||
pop %rbp
|
||||
pop %r15
|
||||
pop %r12
|
||||
pop %rbx
|
||||
pop %r14
|
||||
pop %r13
|
||||
ret
|
||||
ALIGN(16)
|
||||
one:
|
||||
mov (%r8),%r9
|
||||
mov (%rsi),%r11
|
||||
imul %r9,%rcx
|
||||
mov %rcx,%rax
|
||||
mul %r11
|
||||
add %r9,%rax
|
||||
C rax is zero here
|
||||
adc 8(%r8),%rdx
|
||||
cmovnc %rax,%r11
|
||||
sub %r11,%rdx
|
||||
mov %rdx,(%rdi)
|
||||
ret
|
||||
EPILOGUE()
|
||||
Loading…
Reference in New Issue
Block a user