New asm functions for AMD divrem_hensel_qr_1 divrem_hensel_r_1
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mpn/x86_64/k8/divrem_hensel_qr_1.asm
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88
mpn/x86_64/k8/divrem_hensel_qr_1.asm
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dnl X86_64 mpn_divrem_hensel_qr_1
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dnl Copyright 2009 Jason Moxham
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dnl This file is part of the MPIR Library.
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dnl The MPIR Library is free software; you can redistribute it and/or modify
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dnl it under the terms of the GNU Lesser General Public License as published
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dnl by the Free Software Foundation; either version 2.1 of the License, or (at
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dnl your option) any later version.
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dnl The MPIR Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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dnl License for more details.
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dnl You should have received a copy of the GNU Lesser General Public License
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dnl along with the MPIR Library; see the file COPYING.LIB. If not, write
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dnl to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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dnl Boston, MA 02110-1301, USA.
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include(`../config.m4')
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C (rdi,rdx)=(rsi,rdx) / rcx
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C rax=hensel remainder from div
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C This is divrem_hensel_1 with shifting on the output of the quotient
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C On k8/k10 the shifting comes for free so no need to have different
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C fn for that. And on K8/K10 this runs at 10c/l which is optimal
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C This function "replaces" divexact_1 and modexact_1_odd
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C This is same as the shifting version but with no shifting
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ASM_START()
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PROLOGUE(mpn_divrem_hensel_qr_1)
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mov $0,%r9
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sub %rdx,%r9
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lea (%rdi,%rdx,8),%rdi
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lea (%rsi,%rdx,8),%rsi #// last use of rdx
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mov %rcx,%rdx #// rdx is 3 bit inverse
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mov %rdx,%rax
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imul %ecx,%edx
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mov $2,%r11
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sub %rdx,%r11
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imul %eax,%r11d #//r11 has 4 bits
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mov %r11,%rax
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imul %ecx,%r11d
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mov $2,%rdx
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sub %r11,%rdx
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imul %eax,%edx #//rdx has 8 bits
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mov %rdx,%rax
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imul %ecx,%edx
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mov $2,%r11
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sub %rdx,%r11
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imul %eax,%r11d #//r11 has 16 bits
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mov %r11,%rax
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imul %ecx,%r11d
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mov $2,%rdx
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sub %r11,%rdx
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imul %eax,%edx #// rdx has 32 bits
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mov %rdx,%rax
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imul %rcx,%rdx
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mov $2,%r11
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sub %rdx,%r11
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imul %rax,%r11 #//r11 has 64 bits
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#clear carry
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xor %rdx,%rdx
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ALIGN(16)
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loop:
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mov (%rsi,%r9,8),%rax
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sbb %rdx,%rax
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sbb %r8,%r8
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imul %r11,%rax
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mov %rax,(%rdi,%r9,8)
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mul %rcx
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add $1,%r8
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inc %r9
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jnz loop
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mov $0,%rax
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adc %rdx,%rax
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ret
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EPILOGUE()
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86
mpn/x86_64/k8/divrem_hensel_r_1.asm
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86
mpn/x86_64/k8/divrem_hensel_r_1.asm
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@ -0,0 +1,86 @@
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dnl X86_64 mpn_divrem_hensel_r_1
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dnl Copyright 2009 Jason Moxham
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dnl This file is part of the MPIR Library.
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dnl The MPIR Library is free software; you can redistribute it and/or modify
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dnl it under the terms of the GNU Lesser General Public License as published
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dnl by the Free Software Foundation; either version 2.1 of the License, or (at
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dnl your option) any later version.
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dnl The MPIR Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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dnl License for more details.
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dnl You should have received a copy of the GNU Lesser General Public License
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dnl along with the MPIR Library; see the file COPYING.LIB. If not, write
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dnl to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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dnl Boston, MA 02110-1301, USA.
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include(`../config.m4')
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C hensel divide (rdi,rsi) / rdx
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C rax=hensel remainder from div
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C This is divrem_hensel_1 with shifting on the output of the quotient
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C On k8/k10 the shifting comes for free so no need to have different
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C fn for that. And on K8/K10 this runs at 10c/l which is optimal
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C This function "replaces" divexact_1 and modexact_1_odd
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C This is same as the shifting version but with no shifting
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ASM_START()
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PROLOGUE(mpn_divrem_hensel_r_1)
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mov $0,%r9
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sub %rsi,%r9
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lea (%rdi,%rsi,8),%rdi #// last use of rsi
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mov %rdx,%rcx #// rdx is 3 bit inverse and rcx is divisor
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mov %rdx,%rax
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imul %ecx,%edx
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mov $2,%r11
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sub %rdx,%r11
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imul %eax,%r11d #//r11 has 4 bits
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mov %r11,%rax
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imul %ecx,%r11d
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mov $2,%rdx
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sub %r11,%rdx
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imul %eax,%edx #//rdx has 8 bits
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mov %rdx,%rax
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imul %ecx,%edx
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mov $2,%r11
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sub %rdx,%r11
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imul %eax,%r11d #//r11 has 16 bits
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mov %r11,%rax
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imul %ecx,%r11d
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mov $2,%rdx
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sub %r11,%rdx
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imul %eax,%edx #// rdx has 32 bits
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mov %rdx,%rax
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imul %rcx,%rdx
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mov $2,%r11
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sub %rdx,%r11
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imul %rax,%r11 #//r11 has 64 bits
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#clear carry
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xor %rdx,%rdx
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ALIGN(16)
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loop:
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mov (%rdi,%r9,8),%rax
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sbb %rdx,%rax
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sbb %r8,%r8
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imul %r11,%rax
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mul %rcx
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add $1,%r8
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inc %r9
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jnz loop
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mov $0,%rax
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adc %rdx,%rax
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ret
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EPILOGUE()
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