2009-02-19 18:22:30 -05:00
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; AMD64 mpn_addadd_n
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; Verdxon 1.0.4
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;
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; Copyright 2008 Jason Moxham
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;
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2009-02-22 16:03:08 -05:00
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; Windows Converdxon Copyright 2008 Brian Gladman
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;
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2009-02-19 18:22:30 -05:00
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; This file is part of the MPIR Library.
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; The MPIR Library is free software; you can redistribute it and/or modify
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; it under the terms of the GNU Lesser General Public License as published
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; by the Free Software Foundation; either verdxon 2.1 of the License, or (at
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; your option) any later verdxon.
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; The MPIR Library is distributed in the hope that it will be useful, but
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; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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; License for more details.
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; You should have received a copy of the GNU Lesser General Public License
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; along with the MPIR Library; see the file COPYING.LIB. If not, write
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; to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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; Boston, MA 02110-1301, USA.
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2009-02-22 16:03:08 -05:00
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;
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2009-02-19 18:22:30 -05:00
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; Calling interface (GCC):
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;
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; rcx[r10] = rdx[r10] + r8[r10] + r9[r10]
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;
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; return carry
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;
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; mp_limb_t __gmpn_subsub_n(
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; mp_ptr dp, rcx
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; mp_srcptr sp1, rdx
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; mp_srcptr sp2, r8
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; mp_size_t sp3, r9
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; mp_size_t len [rsp+0x28] -> r10d
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; )
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;
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; This is an SEH frame function
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%include "..\x86_64_asm.inc"
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%define reg_save_list r12, r13, r14, r15
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bits 64
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section .text
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global __gmpn_addadd_n
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%ifdef DLL
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export __gmpn_addadd_n
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%endif
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prologue __gmpn_addadd_n, 0, reg_save_list
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mov r10d, dword [rsp+stack_use+40]
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lea rdx, [rdx+r10*8]
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lea r8, [r8+r10*8]
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lea rcx, [rcx+r10*8]
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lea r9, [r9+r10*8]
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neg r10
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xor rax, rax
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xor r11, r11
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test r10, 3
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jz .2
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.1: mov r12, [r8+r10*8]
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add rax, 1
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adc r12, [r9+r10*8]
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sbb rax, rax
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add r11, 1
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adc r12, [rdx+r10*8]
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sbb r11, r11
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mov [rcx+r10*8], r12
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inc r10
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test r10, 3
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jnz .1
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.2: cmp r10, 0
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jz .4
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2009-02-26 06:11:27 -05:00
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alignb 16, nop
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2009-02-19 18:22:30 -05:00
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.3: add rax, 1
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mov r12, [r8+r10*8]
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mov r14, [r8+r10*8+8]
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mov r15, [r8+r10*8+16]
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mov r13, [r8+r10*8+24]
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adc r12, [r9+r10*8]
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adc r14, [r9+r10*8+8]
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adc r15, [r9+r10*8+16]
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adc r13, [r9+r10*8+24]
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sbb rax, rax
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add r11, 1
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adc r12, [rdx+r10*8]
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adc r14, [rdx+r10*8+8]
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adc r15, [rdx+r10*8+16]
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adc r13, [rdx+r10*8+24]
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mov [rcx+r10*8], r12
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mov [rcx+r10*8+8], r14
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mov [rcx+r10*8+16], r15
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mov [rcx+r10*8+24], r13
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sbb r11, r11
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add r10, 4
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jnz .3
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.4: add rax, r11
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neg rax
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epilogue reg_save_list
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end
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