2010-03-07 19:26:51 -05:00
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dnl IA-64 mpn_addlsh1_n/mpn_sublsh1_n -- rp[] = up[] +- (vp[] << 1).
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dnl Copyright 2003, 2004, 2005 Free Software Foundation, Inc.
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dnl This file is part of the GNU MP Library.
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of the GNU Lesser General Public License as published
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dnl by the Free Software Foundation; either version 3 of the License, or (at
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dnl your option) any later version.
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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dnl License for more details.
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dnl You should have received a copy of the GNU Lesser General Public License
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dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/.
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include(`../config.m4')
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C cycles/limb
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C Itanium: 3.0
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C Itanium 2: 1.5
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C TODO
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C * Use shladd in feed-in code (for mpn_addlsh1_n).
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C INPUT PARAMETERS
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define(`rp',`r32')
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define(`up',`r33')
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define(`vp',`r34')
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define(`n',`r35')
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2010-12-30 01:04:54 -05:00
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define(OPERATION_addlsh1_n,1)
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2010-03-07 19:26:51 -05:00
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ifdef(`OPERATION_addlsh1_n',`
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define(ADDSUB, add)
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define(PRED, ltu)
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define(INCR, 1)
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define(LIM, -1)
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define(func, mpn_addlsh1_n)
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')
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ifdef(`OPERATION_sublsh1_n',`
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define(ADDSUB, sub)
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define(PRED, gtu)
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define(INCR, -1)
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define(LIM, 0)
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define(func, mpn_sublsh1_n)
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')
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C Some useful aliases for registers we use
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define(`u0',`r14') define(`u1',`r15') define(`u2',`r16') define(`u3',`r17')
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define(`v0',`r18') define(`v1',`r19') define(`v2',`r20') define(`v3',`r21')
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define(`w0',`r22') define(`w1',`r23') define(`w2',`r24') define(`w3',`r25')
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define(`s0',`r26') define(`s1',`r27') define(`s2',`r28') define(`s3',`r29')
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define(`x0',`r30') define(`x1',`r31') define(`x2',`r30') define(`x3',`r31')
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ASM_START()
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PROLOGUE(func)
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.prologue
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.save ar.lc, r2
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.body
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ifdef(`HAVE_ABI_32',`
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addp4 rp = 0, rp C M I
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addp4 up = 0, up C M I
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addp4 vp = 0, vp C M I
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zxt4 n = n C I
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;;
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')
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{.mmi; ld8 r11 = [vp], 8 C M01
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ld8 r10 = [up], 8 C M01
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mov.i r2 = ar.lc C I0
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}{.mmi; and r14 = 3, n C M I
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cmp.lt p15, p0 = 4, n C M I
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add n = -4, n C M I
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;;
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}{.mmi; cmp.eq p6, p0 = 1, r14 C M I
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cmp.eq p7, p0 = 2, r14 C M I
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cmp.eq p8, p0 = 3, r14 C M I
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}{.bbb
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(p6) br.dptk .Lb01 C B
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(p7) br.dptk .Lb10 C B
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(p8) br.dptk .Lb11 C B
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}
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.Lb00: ld8 v0 = [vp], 8 C M01
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ld8 u0 = [up], 8 C M01
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shr.u n = n, 2 C I0
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;;
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ld8 v1 = [vp], 8 C M01
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ld8 u1 = [up], 8 C M01
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add x3 = r11, r11 C M I
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;;
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ld8 v2 = [vp], 8 C M01
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ld8 u2 = [up], 8 C M01
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ADDSUB w3 = r10, x3 C M I
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(p15) br.dpnt .grt4 C B
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;;
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shrp x0 = v0, r11, 63 C I0
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cmp.PRED p8, p0 = w3, r10 C M I
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;;
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shrp x1 = v1, v0, 63 C I0
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ADDSUB w0 = u0, x0 C M I
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;;
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cmp.PRED p6, p0 = w0, u0 C M I
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ADDSUB w1 = u1, x1 C M I
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br .Lcj4 C B
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.grt4: ld8 v3 = [vp], 8 C M01
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shrp x0 = v0, r11, 63 C I0
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cmp.PRED p8, p0 = w3, r10 C M I
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add n = -1, n
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;;
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ld8 u3 = [up], 8 C M01
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mov.i ar.lc = n C I0
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shrp x1 = v1, v0, 63 C I0
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ld8 v0 = [vp], 8 C M01
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ADDSUB w0 = u0, x0 C M I
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;;
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cmp.PRED p6, p0 = w0, u0 C M I
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ld8 u0 = [up], 8 C M01
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ADDSUB w1 = u1, x1 C M I
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br .LL00 C B
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.Lb01: add x2 = r11, r11 C M I
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shr.u n = n, 2 C I0
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(p15) br.dpnt .grt1 C B
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;;
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ADDSUB w2 = r10, x2 C M I
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shr.u r8 = r11, 63 C retval I0
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;;
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cmp.PRED p6, p0 = w2, r10 C M I
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;;
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st8 [rp] = w2, 8 C M23
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(p6) add r8 = 1, r8 C M I
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br.ret.sptk.many b0 C B
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.grt1: ld8 v3 = [vp], 8 C M01
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ld8 u3 = [up], 8 C M01
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mov.i ar.lc = n C FIXME swap with next I0
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;;
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ld8 v0 = [vp], 8 C M01
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ld8 u0 = [up], 8 C M01
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ADDSUB w2 = r10, x2
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;;
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ld8 v1 = [vp], 8 C M01
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ld8 u1 = [up], 8 C M01
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shrp x3 = v3, r11, 63 C I0
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;;
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ld8 v2 = [vp], 8 C M01
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ld8 u2 = [up], 8 C M01
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cmp.PRED p6, p0 = w2, r10 C M I
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ADDSUB w3 = u3, x3 C M I
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br.cloop.dptk .grt5 C B
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;;
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shrp x0 = v0, v3, 63 C I0
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cmp.PRED p8, p0 = w3, u3 C M I
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br .Lcj5 C B
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.grt5: shrp x0 = v0, v3, 63 C I0
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ld8 v3 = [vp], 8 C M01
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cmp.PRED p8, p0 = w3, u3 C M I
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br .LL01 C B
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.Lb10: ld8 v2 = [vp], 8 C M01
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ld8 u2 = [up], 8 C M01
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shr.u n = n, 2 C I0
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add x1 = r11, r11 C M I
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(p15) br.dpnt .grt2 C B
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;;
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ADDSUB w1 = r10, x1 C M I
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shrp x2 = v2, r11, 63 C I0
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;;
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cmp.PRED p8, p0 = w1, r10 C M I
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ADDSUB w2 = u2, x2 C M I
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shr.u r8 = v2, 63 C retval I0
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;;
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cmp.PRED p6, p0 = w2, u2 C M I
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br .Lcj2 C B
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.grt2: ld8 v3 = [vp], 8 C M01
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ld8 u3 = [up], 8 C M01
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mov.i ar.lc = n C I0
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;;
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ld8 v0 = [vp], 8 C M01
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ld8 u0 = [up], 8 C M01
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ADDSUB w1 = r10, x1 C M I
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;;
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ld8 v1 = [vp], 8 C M01
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shrp x2 = v2, r11, 63 C I0
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cmp.PRED p8, p0 = w1, r10 C M I
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;;
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ld8 u1 = [up], 8 C M01
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shrp x3 = v3, v2, 63 C I0
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ld8 v2 = [vp], 8 C M01
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ADDSUB w2 = u2, x2 C M I
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;;
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cmp.PRED p6, p0 = w2, u2 C M I
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ld8 u2 = [up], 8 C M01
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ADDSUB w3 = u3, x3 C M I
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br.cloop.dpnt .Loop C B
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br .Lskip C B
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.Lb11: ld8 v1 = [vp], 8 C M01
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ld8 u1 = [up], 8 C M01
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shr.u n = n, 2 C I0
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add x0 = r11, r11 C M I
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;;
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ld8 v2 = [vp], 8 C M01
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ld8 u2 = [up], 8 C M01
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(p15) br.dpnt .grt3 C B
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;;
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shrp x1 = v1, r11, 63 C I0
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ADDSUB w0 = r10, x0 C M I
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;;
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cmp.PRED p6, p0 = w0, r10 C M I
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ADDSUB w1 = u1, x1 C M I
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;;
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shrp x2 = v2, v1, 63 C I0
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cmp.PRED p8, p0 = w1, u1 C M I
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br .Lcj3 C B
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.grt3: ld8 v3 = [vp], 8 C M01
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ld8 u3 = [up], 8 C M01
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mov.i ar.lc = n C I0
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shrp x1 = v1, r11, 63 C I0
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ADDSUB w0 = r10, x0 C M I
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;;
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ld8 v0 = [vp], 8 C M01
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cmp.PRED p6, p0 = w0, r10 C M I
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ld8 u0 = [up], 8 C M01
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ADDSUB w1 = u1, x1 C M I
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;;
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shrp x2 = v2, v1, 63 C I0
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ld8 v1 = [vp], 8 C M01
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cmp.PRED p8, p0 = w1, u1 C M I
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br .LL11 C B
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C *** MAIN LOOP START ***
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ALIGN(32)
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.Loop: st8 [rp] = w1, 8 C M23
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shrp x0 = v0, v3, 63 C I0
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(p8) cmp.eq.or p6, p0 = LIM, w2 C M I
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(p8) add w2 = INCR, w2 C M I
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ld8 v3 = [vp], 8 C M01
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cmp.PRED p8, p0 = w3, u3 C M I
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;;
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.LL01: ld8 u3 = [up], 8 C M01
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shrp x1 = v1, v0, 63 C I0
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(p6) cmp.eq.or p8, p0 = LIM, w3 C M I
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(p6) add w3 = INCR, w3 C M I
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ld8 v0 = [vp], 8 C M01
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ADDSUB w0 = u0, x0 C M I
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;;
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st8 [rp] = w2, 8 C M23
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cmp.PRED p6, p0 = w0, u0 C M I
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ld8 u0 = [up], 8 C M01
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ADDSUB w1 = u1, x1 C M I
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;;
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.LL00: st8 [rp] = w3, 8 C M23
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shrp x2 = v2, v1, 63 C I0
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(p8) cmp.eq.or p6, p0 = LIM, w0 C M I
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(p8) add w0 = INCR, w0 C M I
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ld8 v1 = [vp], 8 C M01
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cmp.PRED p8, p0 = w1, u1 C M I
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;;
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.LL11: ld8 u1 = [up], 8 C M01
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shrp x3 = v3, v2, 63 C I0
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(p6) cmp.eq.or p8, p0 = LIM, w1 C M I
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(p6) add w1 = INCR, w1 C M I
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ld8 v2 = [vp], 8 C M01
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ADDSUB w2 = u2, x2 C M I
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;;
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st8 [rp] = w0, 8 C M23
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cmp.PRED p6, p0 = w2, u2 C M I
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ld8 u2 = [up], 8 C M01
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ADDSUB w3 = u3, x3 C M I
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br.cloop.dptk .Loop C B
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;;
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C *** MAIN LOOP END ***
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.Lskip: st8 [rp] = w1, 8 C M23
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shrp x0 = v0, v3, 63 C I0
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(p8) cmp.eq.or p6, p0 = LIM, w2 C M I
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(p8) add w2 = INCR, w2 C M I
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cmp.PRED p8, p0 = w3, u3 C M I
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;;
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.Lcj5: shrp x1 = v1, v0, 63 C I0
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(p6) cmp.eq.or p8, p0 = LIM, w3 C M I
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(p6) add w3 = INCR, w3 C M I
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ADDSUB w0 = u0, x0 C M I
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|
;;
|
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|
|
|
st8 [rp] = w2, 8 C M23
|
|
|
|
|
cmp.PRED p6, p0 = w0, u0 C M I
|
|
|
|
|
ADDSUB w1 = u1, x1 C M I
|
|
|
|
|
;;
|
|
|
|
|
.Lcj4: st8 [rp] = w3, 8 C M23
|
|
|
|
|
shrp x2 = v2, v1, 63 C I0
|
|
|
|
|
(p8) cmp.eq.or p6, p0 = LIM, w0 C M I
|
|
|
|
|
(p8) add w0 = INCR, w0 C M I
|
|
|
|
|
cmp.PRED p8, p0 = w1, u1 C M I
|
|
|
|
|
;;
|
|
|
|
|
.Lcj3: shr.u r8 = v2, 63 C I0
|
|
|
|
|
(p6) cmp.eq.or p8, p0 = LIM, w1 C M I
|
|
|
|
|
(p6) add w1 = INCR, w1 C M I
|
|
|
|
|
ADDSUB w2 = u2, x2 C M I
|
|
|
|
|
;;
|
|
|
|
|
st8 [rp] = w0, 8 C M23
|
|
|
|
|
cmp.PRED p6, p0 = w2, u2 C M I
|
|
|
|
|
;;
|
|
|
|
|
.Lcj2: st8 [rp] = w1, 8 C M23
|
|
|
|
|
(p8) cmp.eq.or p6, p0 = LIM, w2 C M I
|
|
|
|
|
(p8) add w2 = INCR, w2 C M I
|
|
|
|
|
;;
|
|
|
|
|
.Lcj1: st8 [rp] = w2, 8 C M23
|
|
|
|
|
mov.i ar.lc = r2 C I0
|
|
|
|
|
(p6) add r8 = 1, r8 C M I
|
|
|
|
|
br.ret.sptk.many b0 C B
|
|
|
|
|
EPILOGUE()
|
|
|
|
|
ASM_END()
|
