225 lines
4.8 KiB
NASM
225 lines
4.8 KiB
NASM
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dnl Alpha ev6 nails mpn_add_n and mpn_sub_n.
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dnl Copyright 2002, 2006 Free Software Foundation, Inc.
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dnl
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dnl This file is part of the GNU MP Library.
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dnl
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dnl The GNU MP Library is free software; you can redistribute it and/or
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dnl modify it under the terms of the GNU Lesser General Public License as
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dnl published by the Free Software Foundation; either version 2.1 of the
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dnl License, or (at your option) any later version.
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dnl
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dnl The GNU MP Library is distributed in the hope that it will be useful,
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dnl but WITHOUT ANY WARRANTY; without even the implied warranty of
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dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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dnl Lesser General Public License for more details.
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dnl
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dnl You should have received a copy of the GNU Lesser General Public
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dnl License along with the GNU MP Library; see the file COPYING.LIB. If
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dnl not, write to the Free Software Foundation, Inc., 51 Franklin Street,
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dnl Fifth Floor, Boston, MA 02110-1301, USA.
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dnl Runs at 2.5 cycles/limb. It would be possible to reach 2.0 cycles/limb
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dnl with 8-way unrolling.
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include(`../config.m4')
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dnl INPUT PARAMETERS
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define(`rp',`r16')
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define(`up',`r17')
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define(`vp',`r18')
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define(`n',`r19')
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define(`rl0',`r0')
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define(`rl1',`r1')
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define(`rl2',`r2')
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define(`rl3',`r3')
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define(`ul0',`r4')
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define(`ul1',`r5')
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define(`ul2',`r6')
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define(`ul3',`r7')
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define(`vl0',`r22')
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define(`vl1',`r23')
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define(`vl2',`r24')
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define(`vl3',`r25')
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define(`numb_mask',`r21')
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define(`NAIL_BITS',`GMP_NAIL_BITS')
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define(`CYSH',`GMP_NUMB_BITS')
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dnl This declaration is munged by configure
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NAILS_SUPPORT(1-63)
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ifdef(`OPERATION_add_n', `
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define(`OP', addq)
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define(`CYSH',`GMP_NUMB_BITS')
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define(`func', mpn_add_n)')
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ifdef(`OPERATION_sub_n', `
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define(`OP', subq)
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define(`CYSH',63)
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define(`func', mpn_sub_n)')
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MULFUNC_PROLOGUE(mpn_add_n mpn_sub_n)
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ASM_START()
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PROLOGUE(func)
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lda numb_mask, -1(r31)
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srl numb_mask, NAIL_BITS, numb_mask
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bis r31, r31, r20
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and n, 3, r25
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lda n, -4(n)
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beq r25, L(ge4)
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L(lp0): ldq ul0, 0(up)
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lda up, 8(up)
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ldq vl0, 0(vp)
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lda vp, 8(vp)
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lda rp, 8(rp)
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lda r25, -1(r25)
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OP ul0, vl0, rl0
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OP rl0, r20, rl0
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and rl0, numb_mask, r28
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stq r28, -8(rp)
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srl rl0, CYSH, r20
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bne r25, L(lp0)
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blt n, L(ret)
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L(ge4): ldq ul0, 0(up)
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ldq vl0, 0(vp)
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ldq ul1, 8(up)
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ldq vl1, 8(vp)
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ldq ul2, 16(up)
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ldq vl2, 16(vp)
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ldq ul3, 24(up)
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ldq vl3, 24(vp)
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lda up, 32(up)
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lda vp, 32(vp)
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lda n, -4(n)
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bge n, L(ge8)
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OP ul0, vl0, rl0 C main-add 0
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OP rl0, r20, rl0 C cy-add 0
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OP ul1, vl1, rl1 C main-add 1
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srl rl0, CYSH, r20 C gen cy 0
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OP rl1, r20, rl1 C cy-add 1
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and rl0,numb_mask, r27
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br r31, L(cj0)
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L(ge8): OP ul0, vl0, rl0 C main-add 0
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ldq ul0, 0(up)
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ldq vl0, 0(vp)
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OP rl0, r20, rl0 C cy-add 0
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OP ul1, vl1, rl1 C main-add 1
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srl rl0, CYSH, r20 C gen cy 0
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ldq ul1, 8(up)
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ldq vl1, 8(vp)
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OP rl1, r20, rl1 C cy-add 1
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and rl0,numb_mask, r27
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OP ul2, vl2, rl2 C main-add 2
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srl rl1, CYSH, r20 C gen cy 1
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ldq ul2, 16(up)
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ldq vl2, 16(vp)
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OP rl2, r20, rl2 C cy-add 2
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and rl1,numb_mask, r28
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stq r27, 0(rp)
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OP ul3, vl3, rl3 C main-add 3
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srl rl2, CYSH, r20 C gen cy 2
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ldq ul3, 24(up)
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ldq vl3, 24(vp)
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OP rl3, r20, rl3 C cy-add 3
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and rl2,numb_mask, r27
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stq r28, 8(rp)
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lda rp, 32(rp)
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lda up, 32(up)
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lda vp, 32(vp)
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lda n, -4(n)
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blt n, L(end)
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ALIGN(32)
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L(top): OP ul0, vl0, rl0 C main-add 0
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srl rl3, CYSH, r20 C gen cy 3
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ldq ul0, 0(up)
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ldq vl0, 0(vp)
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OP rl0, r20, rl0 C cy-add 0
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and rl3,numb_mask, r28
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stq r27, -16(rp)
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bis r31, r31, r31
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OP ul1, vl1, rl1 C main-add 1
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srl rl0, CYSH, r20 C gen cy 0
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ldq ul1, 8(up)
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ldq vl1, 8(vp)
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OP rl1, r20, rl1 C cy-add 1
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and rl0,numb_mask, r27
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stq r28, -8(rp)
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bis r31, r31, r31
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OP ul2, vl2, rl2 C main-add 2
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srl rl1, CYSH, r20 C gen cy 1
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ldq ul2, 16(up)
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ldq vl2, 16(vp)
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OP rl2, r20, rl2 C cy-add 2
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and rl1,numb_mask, r28
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stq r27, 0(rp)
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bis r31, r31, r31
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OP ul3, vl3, rl3 C main-add 3
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srl rl2, CYSH, r20 C gen cy 2
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ldq ul3, 24(up)
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ldq vl3, 24(vp)
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OP rl3, r20, rl3 C cy-add 3
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and rl2,numb_mask, r27
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stq r28, 8(rp)
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bis r31, r31, r31
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bis r31, r31, r31
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lda n, -4(n)
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lda up, 32(up)
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lda vp, 32(vp)
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bis r31, r31, r31
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bis r31, r31, r31
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lda rp, 32(rp)
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bge n, L(top)
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L(end): OP ul0, vl0, rl0 C main-add 0
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srl rl3, CYSH, r20 C gen cy 3
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OP rl0, r20, rl0 C cy-add 0
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and rl3,numb_mask, r28
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stq r27, -16(rp)
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OP ul1, vl1, rl1 C main-add 1
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srl rl0, CYSH, r20 C gen cy 0
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OP rl1, r20, rl1 C cy-add 1
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and rl0,numb_mask, r27
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stq r28, -8(rp)
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L(cj0): OP ul2, vl2, rl2 C main-add 2
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srl rl1, CYSH, r20 C gen cy 1
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OP rl2, r20, rl2 C cy-add 2
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and rl1,numb_mask, r28
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stq r27, 0(rp)
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OP ul3, vl3, rl3 C main-add 3
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srl rl2, CYSH, r20 C gen cy 2
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OP rl3, r20, rl3 C cy-add 3
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and rl2,numb_mask, r27
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stq r28, 8(rp)
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srl rl3, CYSH, r20 C gen cy 3
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and rl3,numb_mask, r28
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stq r27, 16(rp)
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stq r28, 24(rp)
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L(ret): and r20, 1, r0
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ret r31, (r26), 1
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EPILOGUE()
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ASM_END()
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