145 lines
2.6 KiB
NASM
145 lines
2.6 KiB
NASM
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dnl PowerPC 750 mpn_rshift -- mpn right shift.
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dnl Copyright 2002, 2003 Free Software Foundation, Inc.
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dnl This file is part of the GNU MP Library.
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of the GNU Lesser General Public License as published
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dnl by the Free Software Foundation; either version 2.1 of the License, or (at
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dnl your option) any later version.
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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dnl License for more details.
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dnl You should have received a copy of the GNU Lesser General Public License
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dnl along with the GNU MP Library; see the file COPYING.LIB. If not, write
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dnl to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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dnl Boston, MA 02110-1301, USA.
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include(`../config.m4')
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C cycles/limb
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C 750: 3.0
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C 7400: 3.0
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C mp_limb_t mpn_rshift (mp_ptr dst, mp_srcptr src, mp_size_t size,
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C unsigned shift);
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C
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C This code is the same per-limb speed as mpn/powerpc32/rshift.asm, but
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C smaller and saving about 30 or so cycles of overhead.
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ASM_START()
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PROLOGUE(mpn_rshift)
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C r3 dst
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C r4 src
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C r5 size
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C r6 shift
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mtctr r5 C size
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lwz r8, 0(r4) C src[0]
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subfic r7, r6, 32 C 32-shift
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addi r5, r3, -4 C dst-4
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slw r3, r8, r7 C return value
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bdz L(one)
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lwzu r9, 4(r4) C src[1]
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srw r8, r8, r6 C src[0] >> shift
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bdz L(two)
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L(top):
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C r3 return value
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C r4 src, incrementing
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C r5 dst, incrementing
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C r6 shift
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C r7 32-shift
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C r8 src[i-1] >> shift
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C r9 src[i]
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C r10
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lwzu r10, 4(r4)
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slw r11, r9, r7
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or r8, r8, r11
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stwu r8, 4(r5)
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srw r8, r9, r6
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bdz L(odd)
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C r8 src[i-1] >> shift
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C r9
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C r10 src[i]
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lwzu r9, 4(r4)
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slw r11, r10, r7
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or r8, r8, r11
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stwu r8, 4(r5)
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srw r8, r10, r6
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bdnz L(top)
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L(two):
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C r3 return value
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C r4
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C r5 &dst[size-2]
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C r6 shift
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C r7 32-shift
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C r8 src[size-2] >> shift
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C r9 src[size-1]
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C r10
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slw r11, r9, r7
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srw r12, r9, r6 C src[size-1] >> shift
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or r8, r8, r11
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stw r12, 8(r5) C dst[size-1]
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stw r8, 4(r5) C dst[size-2]
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blr
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L(odd):
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C r3 return value
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C r4
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C r5 &dst[size-2]
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C r6 shift
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C r7 32-shift
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C r8 src[size-2] >> shift
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C r9
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C r10 src[size-1]
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slw r11, r10, r7
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srw r12, r10, r6
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or r8, r8, r11
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stw r12, 8(r5) C dst[size-1]
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stw r8, 4(r5) C dst[size-2]
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blr
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L(one):
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C r3 return value
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C r4
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C r5 dst-4
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C r6 shift
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C r7
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C r8 src[0]
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srw r8, r8, r6
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stw r8, 4(r5) C dst[0]
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blr
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EPILOGUE(mpn_rshift)
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