401 lines
9.5 KiB
ActionScript
401 lines
9.5 KiB
ActionScript
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; **************************************************************************
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; Intel64 mpn_submul_1 -- Multiply a limb vector with a limb and
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; subtract the result from a second limb vector.
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;
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; Copyright (C) 2006 Jason Worth Martin <jason.worth.martin@gmail.com>
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;
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; This program is free software; you can redistribute it and/or modify
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; it under the terms of the GNU Lesser General Public License as published
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; by the Free Software Foundation; either version 2 of the License, or
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; (at your option) any later version.
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;
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; This program is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU Lesser General Public License
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; along with this program; if not, write to the Free Software Foundation,
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; Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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;
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; **************************************************************************
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;
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;
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; CREDITS
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;
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; This code is based largely on Pierrick Gaudry's excellent assembly
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; support for the AMD64 architecture. (Note that Intel64 and AMD64,
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; while using the same instruction set, have very different
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; microarchitectures. So, this code performs very poorly on AMD64
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; machines even though it is near-optimal on Intel64.)
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;
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; Roger Golliver works for Intel and provided insightful improvements
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; particularly in using the "lea" instruction to perform additions
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; and register-to-register moves.
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;
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; Eric Bainville has a brilliant exposition of optimizing arithmetic for
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; AMD64 (http://www.bealto.it). I adapted many of the ideas he
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; describes to Intel64.
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;
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; Agner Fog is a demigod in the x86 world. If you are reading assembly
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; code files and you haven't heard of Agner Fog, then take a minute to
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; look over his software optimization manuals (http://www.agner.org/).
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; They are superb.
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;
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; *********************************************************************
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; With a 4-way unroll the code has
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;
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; cycles/limb
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; Hammer: 4.6
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; Woodcrest: 4.6
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;
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; With increased unrolling, it appears to converge to 4 cycles/limb
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; on Intel Core 2 machines. I believe that this is optimal, however
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; it requires such absurd unrolling that it becomes unusable for all
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; but the largest inputs. A 4-way unroll seems like a good balance
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; to me because then commonly used input sizes (e.g. 1024bit Public
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; keys) still benifit from the speed up.
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;
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; This is just a check to see if we are in my code testing sandbox
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; or if we are actually in the GMP source tree
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;
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%include 'yasm_mac.inc'
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; *********************************************************************
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; *********************************************************************
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;
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; Here are the important macro parameters for the code
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;
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; BpL is Bytes per Limb (8 since this is 64bit code)
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;
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; UNROLL_SIZE is a power of 2 for which we unroll the code.
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; possible values are 2,4,8,15,..., 256. A reasonable
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; value is probably 4. If really large inputs
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; are expected, then 16 is probably good. Larger
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; values are really only useful for flashy
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; benchmarks and testing asymptotic behavior.
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;
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; THRESHOLD is the minimum number of limbs needed before we bother
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; using the complicated loop. A reasonable value is
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; 2*UNROLL_SIZE + 6
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;
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; *********************************************************************
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; *********************************************************************
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%define BpL 8
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%define UNROLL_SIZE 4
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%define UNROLL_MASK UNROLL_SIZE-1
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%define THRESHOLD 2*UNROLL_SIZE+6
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; Here is a convenient Macro for addressing
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; memory. Entries of the form
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;
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; ADDR(ptr,index,displacement)
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;
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; get converted to
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;
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; [displacement*BpL + ptr + index*BpL]
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;
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%define ADDR(a,b,c) [c*BpL+a+b*BpL]
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; Register Usage
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; -------- -----
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; rax low word from mul
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; rbx*
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; rcx s2limb
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; rdx high word from mul
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; rsi s1p
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; rdi rp
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; rbp* Base Pointer
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; rsp* Stack Pointer
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; r8 A_x
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; r9 A_y
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; r10 A_z
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; r11 B_x
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; r12* B_y
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; r13* B_z
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; r14* temp
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; r15* index
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;
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; * indicates that the register must be
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; preserved for the caller.
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%define s2limb rcx
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%define s1p rsi
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%define rp rdi
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%define A_x r8
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%define A_y r9
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%define A_z r10
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%define B_x r11
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%define B_y r12
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%define B_z r13
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%define temp r14
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%define index r15
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; INPUT PARAMETERS
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; rp rdi
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; s1p rsi
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; n rdx
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; s2limb rcx
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BITS 64
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GLOBAL_FUNC mpn_submul_1
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; Compare the limb count
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; with the threshold value.
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; If the limb count is small
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; we just use the small loop,
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; otherwise we jump to the
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; more complicated loop.
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cmp rdx,THRESHOLD
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jge L_mpn_submul_1_main_loop_prep
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mov r11,rdx
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lea rsi,[rsi+rdx*8]
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lea rdi,[rdi+rdx*8]
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neg r11
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xor r8, r8
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xor r10, r10
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jmp L_mpn_submul_1_small_loop
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align 16
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L_mpn_submul_1_small_loop:
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mov rax,[rsi+r11*8]
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mul rcx
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add rax,r8
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adc rdx,r10
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sub [rdi+r11*8],rax
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mov r8,r10
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adc r8,rdx
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inc r11
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jne L_mpn_submul_1_small_loop
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mov rax,r8
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ret
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L_mpn_submul_1_main_loop_prep:
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push r15
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push r14
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push r13
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push r12
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; If n is even, we need to do three
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; pre-multiplies, if n is odd we only
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; need to do two.
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mov temp,rdx
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mov index,0
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mov A_x,0
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mov A_y,0
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and rdx,1
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jnz L_mpn_submul_1_odd_n
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; Case n is even
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mov rax,ADDR(s1p,index,0)
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mul s2limb
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sub ADDR(rp,index,0),rax
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adc A_x,rdx
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add index,1
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; At this point
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; temp = n (even)
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; index = 1
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L_mpn_submul_1_odd_n:
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; Now
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; temp = n
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; index = 1 if n even
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; = 0 if n odd
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;
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mov rax,ADDR(s1p,index,0)
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mul s2limb
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mov A_z,ADDR(rp,index,0)
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add A_x,rax
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adc A_y,rdx
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mov rax,ADDR(s1p,index,1)
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mul s2limb
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mov B_z,ADDR(rp,index,1)
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mov B_x,rax
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mov B_y,rdx
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mov rax,ADDR(s1p,index,2)
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add index,3
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lea s1p,ADDR(s1p,temp,-1)
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lea rp,ADDR(rp,temp,-1)
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neg temp
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add index,temp
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; At this point:
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; s1p = address of last s1limb
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; rp = address of last rplimb
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; temp = -n
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; index = 4 - n if n even
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; = 3 - n if n odd
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;
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; So, index is a (negative) even
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; number.
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;
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; *****************************************
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; ATTENTION:
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;
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; From here on, I will use array
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; indexing notation in the comments
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; because it is convenient. So, I
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; will pretend that index is positive
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; because then a comment like
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; B_z = rp[index-1]
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; is easier to read.
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; However, keep in mind that index is
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; actually a negative number indexing
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; back from the end of the array.
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; This is a common trick to remove one
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; compare operation from the main loop.
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; *****************************************
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;
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; Now we enter a spin-up loop the
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; will make sure that the index is
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; a multiple of UNROLL_SIZE before
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; going to our main unrolled loop.
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mov temp,index
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neg temp
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and temp,UNROLL_MASK
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jz L_mpn_submul_1_main_loop
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shr temp,1
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L_mpn_submul_1_main_loop_spin_up:
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; At this point we should have:
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;
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; A_x = low_mul[index-2] + carry_in
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; A_y = high_mul[index-2] + CF
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; A_z = rp[index-2]
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;
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; B_x = low_mul[index-1]
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; B_y = high_mul[index-1]
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; B_z = rp[index-1]
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;
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; rax = s1p[index]
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mul s2limb
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sub A_z,A_x
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lea A_x,[rax]
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mov rax,ADDR(s1p,index,1)
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adc B_x,A_y
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mov ADDR(rp,index,-2),A_z
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mov A_z,ADDR(rp,index,0)
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adc B_y,0
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lea A_y,[rdx]
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; At this point we should have:
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;
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; B_x = low_mul[index-1] + carry_in
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; B_y = high_mul[index-1] + CF
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; B_z = rp[index-1]
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;
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; A_x = low_mul[index]
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; A_y = high_mul[index]
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; A_z = rp[index]
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;
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; rax = s1p[index+1]
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mul s2limb
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sub B_z,B_x
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lea B_x,[rax]
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mov rax,ADDR(s1p,index,2)
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adc A_x,B_y
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mov ADDR(rp,index,-1),B_z
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mov B_z,ADDR(rp,index,1)
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adc A_y,0
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lea B_y,[rdx]
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add index,2
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sub temp,1
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jnz L_mpn_submul_1_main_loop_spin_up
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jmp L_mpn_submul_1_main_loop
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align 16
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L_mpn_submul_1_main_loop:
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; The code here is really the same
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; logic as the spin-up loop. It's
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; just been unrolled.
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%assign unroll_index 0
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%rep UNROLL_SIZE/2
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mul s2limb
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sub A_z,A_x
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lea A_x,[rax]
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mov rax,ADDR(s1p,index,(2*unroll_index+1))
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adc B_x,A_y
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mov ADDR(rp,index,(2*unroll_index-2)),A_z
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mov A_z,ADDR(rp,index,(2*unroll_index))
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adc B_y,0
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lea A_y,[rdx]
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mul s2limb
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sub B_z,B_x
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lea B_x,[rax]
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mov rax,ADDR(s1p,index,(2*unroll_index+2))
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adc A_x,B_y
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mov ADDR(rp,index,(2*unroll_index-1)),B_z
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mov B_z,ADDR(rp,index,(2*unroll_index+1))
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adc A_y,0
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lea B_y,[rdx]
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%assign unroll_index unroll_index+1
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%endrep
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add index,UNROLL_SIZE
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jnz L_mpn_submul_1_main_loop
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L_mpn_submul_1_finish:
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; At this point we should have:
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;
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; index = n-1
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;
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; A_x = low_mul[index-2] + carry_in
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; A_y = high_mul[index-2] + CF
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; A_z = rp[index-2]
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;
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; B_x = low_mul[index-1]
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; B_y = high_mul[index-1]
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; B_z = rp[index-1]
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;
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; rax = s1p[index]
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mul s2limb
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sub A_z,A_x
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mov A_x,rax
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mov ADDR(rp,index,-2),A_z
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mov A_z,ADDR(rp,index,0)
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adc B_x,A_y
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adc B_y,0
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mov A_y,rdx
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; At this point we should have:
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;
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; index = n-1
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;
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; B_x = low_mul[index-1] + carry_in
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; B_y = high_mul[index-1] + CF
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; B_z = rp[index-1]
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;
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; A_x = low_mul[index]
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; A_y = high_mul[index]
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; A_z = rp[index]
|
||
|
|
sub B_z,B_x
|
||
|
|
mov ADDR(rp,index,-1),B_z
|
||
|
|
adc A_x,B_y
|
||
|
|
adc A_y,0
|
||
|
|
; At this point we should have:
|
||
|
|
;
|
||
|
|
; index = n-1
|
||
|
|
;
|
||
|
|
; A_x = low_mul[index] + carry_in
|
||
|
|
; A_y = high_mul[index] + CF
|
||
|
|
; A_z = rp[index]
|
||
|
|
;
|
||
|
|
sub A_z,A_x
|
||
|
|
mov ADDR(rp,index,0),A_z
|
||
|
|
adc A_y,0
|
||
|
|
|
||
|
|
mov rax,A_y
|
||
|
|
pop r12
|
||
|
|
pop r13
|
||
|
|
pop r14
|
||
|
|
pop r15
|
||
|
|
ret
|