Rename CPUID bits constants for clarity
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@ -22,18 +22,18 @@ typedef struct CPUFeatures_ {
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static CPUFeatures _cpu_features;
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static CPUFeatures _cpu_features;
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#define CPUID_SSE2 0x04000000
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#define CPUID_EBX_AVX2 0x00000020
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#define CPUIDECX_SSE3 0x00000001
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#define CPUID_ECX_SSE3 0x00000001
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#define CPUIDECX_SSSE3 0x00000200
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#define CPUID_ECX_PCLMUL 0x00000002
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#define CPUIDECX_SSE41 0x00080000
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#define CPUID_ECX_SSSE3 0x00000200
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#define CPUIDECX_AVX 0x10000000
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#define CPUID_ECX_SSE41 0x00080000
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#define CPUIDECX_PCLMUL 0x00000002
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#define CPUID_ECX_AESNI 0x02000000
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#define CPUIDECX_AESNI 0x02000000
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#define CPUID_ECX_XSAVE 0x04000000
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#define CPUIDECX_XSAVE 0x04000000
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#define CPUID_ECX_OSXSAVE 0x08000000
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#define CPUIDECX_OSXSAVE 0x08000000
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#define CPUID_ECX_AVX 0x10000000
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#define CPUIDEBX_AVX2 0x00000020
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#define CPUID_EDX_SSE2 0x04000000
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#define XCR0_SSE 0x00000002
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#define XCR0_SSE 0x00000002
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#define XCR0_AVX 0x00000004
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#define XCR0_AVX 0x00000004
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@ -115,28 +115,28 @@ _sodium_runtime_intel_cpu_features(CPUFeatures * const cpu_features)
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_cpuid(cpu_info, 0x00000001);
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_cpuid(cpu_info, 0x00000001);
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#if defined(HAVE_EMMINTRIN_H) || \
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#if defined(HAVE_EMMINTRIN_H) || \
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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cpu_features->has_sse2 = ((cpu_info[3] & CPUID_SSE2) != 0x0);
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cpu_features->has_sse2 = ((cpu_info[3] & CPUID_EDX_SSE2) != 0x0);
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#else
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#else
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cpu_features->has_sse2 = 0;
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cpu_features->has_sse2 = 0;
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#endif
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#endif
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#if defined(HAVE_PMMINTRIN_H) || \
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#if defined(HAVE_PMMINTRIN_H) || \
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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cpu_features->has_sse3 = ((cpu_info[2] & CPUIDECX_SSE3) != 0x0);
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cpu_features->has_sse3 = ((cpu_info[2] & CPUID_ECX_SSE3) != 0x0);
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#else
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#else
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cpu_features->has_sse3 = 0;
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cpu_features->has_sse3 = 0;
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#endif
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#endif
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#if defined(HAVE_TMMINTRIN_H) || \
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#if defined(HAVE_TMMINTRIN_H) || \
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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cpu_features->has_ssse3 = ((cpu_info[2] & CPUIDECX_SSSE3) != 0x0);
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cpu_features->has_ssse3 = ((cpu_info[2] & CPUID_ECX_SSSE3) != 0x0);
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#else
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#else
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cpu_features->has_ssse3 = 0;
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cpu_features->has_ssse3 = 0;
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#endif
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#endif
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#if defined(HAVE_SMMINTRIN_H) || \
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#if defined(HAVE_SMMINTRIN_H) || \
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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cpu_features->has_sse41 = ((cpu_info[2] & CPUIDECX_SSE41) != 0x0);
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cpu_features->has_sse41 = ((cpu_info[2] & CPUID_ECX_SSE41) != 0x0);
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#else
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#else
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cpu_features->has_sse41 = 0;
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cpu_features->has_sse41 = 0;
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#endif
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#endif
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@ -144,8 +144,8 @@ _sodium_runtime_intel_cpu_features(CPUFeatures * const cpu_features)
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cpu_features->has_avx = 0;
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cpu_features->has_avx = 0;
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#if defined(HAVE_AVXINTRIN_H) || \
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#if defined(HAVE_AVXINTRIN_H) || \
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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if ((cpu_info[2] & (CPUIDECX_AVX | CPUIDECX_XSAVE | CPUIDECX_OSXSAVE))
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if ((cpu_info[2] & (CPUID_ECX_AVX | CPUID_ECX_XSAVE | CPUID_ECX_OSXSAVE))
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== (CPUIDECX_AVX | CPUIDECX_XSAVE | CPUIDECX_OSXSAVE)) {
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== (CPUID_ECX_AVX | CPUID_ECX_XSAVE | CPUID_ECX_OSXSAVE)) {
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uint32_t xcr0 = 0U;
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uint32_t xcr0 = 0U;
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# ifdef MSC_VER
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# ifdef MSC_VER
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__asm {
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__asm {
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@ -167,14 +167,14 @@ _sodium_runtime_intel_cpu_features(CPUFeatures * const cpu_features)
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#if defined(HAVE_AVX2INTRIN_H) || \
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#if defined(HAVE_AVX2INTRIN_H) || \
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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if (cpu_features->has_avx) {
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if (cpu_features->has_avx) {
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cpu_features->has_avx2 = ((cpu_info[1] & CPUIDEBX_AVX2) != 0x0);
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cpu_features->has_avx2 = ((cpu_info[1] & CPUID_EBX_AVX2) != 0x0);
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}
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}
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#endif
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#endif
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#if defined(HAVE_WMMINTRIN_H) || \
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#if defined(HAVE_WMMINTRIN_H) || \
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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(defined(_MSC_VER) && (defined(_M_X64) || defined(_M_AMD64) || defined(_M_IX86)))
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cpu_features->has_pclmul = ((cpu_info[2] & CPUIDECX_PCLMUL) != 0x0);
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cpu_features->has_pclmul = ((cpu_info[2] & CPUID_ECX_PCLMUL) != 0x0);
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cpu_features->has_aesni = ((cpu_info[2] & CPUIDECX_AESNI) != 0x0);
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cpu_features->has_aesni = ((cpu_info[2] & CPUID_ECX_AESNI) != 0x0);
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#else
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#else
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cpu_features->has_pclmul = 0;
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cpu_features->has_pclmul = 0;
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cpu_features->has_aesni = 0;
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cpu_features->has_aesni = 0;
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